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AS7C33256PFS36A PDF预览

AS7C33256PFS36A

更新时间: 2022-12-04 00:29:18
品牌 Logo 应用领域
ALSC 静态存储器
页数 文件大小 规格书
20页 528K
描述
3.3V 256K x 32/36 pipelined burst synchronous SRAM

AS7C33256PFS36A 数据手册

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AS7C33256PFS32A  
AS7C33256PFS36A  
®
Write enable truth table (per byte)  
Function  
GWE BWE  
BWa  
X
BWb  
X
BWc  
BWd  
X
L
H
H
H
H
H
X
L
L
L
H
L
X
L
Write All Bytes  
L
L
L
Write Byte a  
L
H
H
L
H
Write Byte c and d  
H
H
L
X
X
X
H
X
Read  
H
H
H
Key: X = don’t care, L = low, H = high, n = a, b, c, d; BWE, BWn = internal write signal.  
Asynchronous Truth Table  
Operation  
Snooze mode  
ZZ  
H
L
OE  
X
I/O Status  
High-Z  
L
Dout  
Read  
L
H
High-Z  
Write  
L
X
Din, High-Z  
High-Z  
Deselected  
L
X
Burst order table  
Interleaved Burst Order (LBO=1)  
A1 A0 A1 A0 A1 A0 A1 A0  
Linear Burst Order (LBO=0)  
A1 A0 A1 A0 A1 A0 A1 A0  
Starting Address  
First increment  
0 0  
0 1  
1 0  
1 1  
0 1  
0 0  
1 1  
1 0  
1 0  
1 1  
0 0  
0 1  
1 1  
1 0  
0 1  
0 0  
Starting Address  
First increment  
0 0  
0 1  
1 0  
1 1  
0 1  
1 0  
1 1  
0 0  
1 0  
1 1  
0 0  
0 1  
1 1  
0 0  
0 1  
1 0  
Second increment  
Third increment  
Second increment  
Third increment  
11/30/04, v.3.1  
Alliance Semiconductor  
P. 6 of 20  

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