Datasheet > AS4C1M16S-CI

AS4C1M16S-CI

更新时间： 2022-02-26 11:04:50

品牌	Logo	应用领域
ALSC		/
页数	文件大小	规格书
54页	1530K
描述
Programmable Mode registers

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AS4C1M16S-CI 数据手册

AS4C1M16S-C&I

Operation Mode

Fully synchronous operations are performed to latch the commands at the positive edges of CLK. Table

4 shows the truth table for the operation commands.

Table 4. Truth Table (Note (1), (2))

Command

BankActivate

State CKE_n-1CKE_nDQM⁽⁶⁾A11 A10 A0-9 CS# RAS# CAS# WE#

Idle⁽³⁾

Any

BankPrecharge

PrechargeAll

Any

Write

Active⁽³⁾

Idle

Write and AutoPrecharge

Read

Read and Autoprecharge

Mode Register Set

No-Operation

OP code

Any

Burst Stop

Active⁽⁴⁾

Device Deselect

AutoRefresh

Any

Idle

SelfRefresh Entry

SelfRefresh Exit

Idle

(SelfRefresh)

Clock Suspend Mode Entry

Power Down Mode Entry

Active

Any⁽⁵⁾

Active

Clock Suspend Mode Exit

Power Down Mode Exit

Any

(PowerDown)

Data Write/Output Enable

Data Mask/Output Disable

Active

Note: 1. V=Valid, X=Don't Care, L=Low level, H=High level

2. CKE_nsignal is input level when commands are provided.

CKE_n-1signal is input level one clock cycle before the commands are provided.

3. These are states of bank designated by A11 signal.

4. Device state is 1, 2, 4, 8, and full page burst operation.

5. Power Down Mode can not enter in the burst operation.

When this command is asserted in the burst cycle, device state is clock suspend mode.

6. LDQM and UDQM

Confidential

Rev. 2.0

March /2015

1...4 5 678 9 10...54

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