Datasheet > AS3V2M16-85BI

AS3V2M16-85BI

更新时间： 2025-07-25 20:36:39

品牌	Logo	应用领域
ALSC		/
页数	文件大小	规格书
10页	160K
描述
Pseudo Static RAM, 2MX16, 85ns, CMOS, PBGA48, 6 X 8 MM, FBGA-48

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数据手册

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AS3V2M16-85BI 数据手册

February 2002

Advance Information

AS3V2M16

2.7V to 3.3V 2M X 16 Super Low-Power CMOS Pseudo Static SRAM

Features

• AS3V2M16

• Equal access and cycle times

• 4 word Page Read Operation

• Known good die availability

• Smallest footprint package

- 48-ball FBGA; 6.0 x 8.0 mm

• ESD protection ≥ 2000 volts

• Latch-up current ≥ 200 mA

• Industrial, commercial and extended temperature ranges

• Organization: 2M words × 16 bits

• 2.7V to 3.3V power supply range

• Fast access times of 55/ 70/ 85 ns

• Low power consumption: ACTIVE

- 150 mW max at 3.3V and 55 ns

• Low power consumption: STANDBY

- 330 µW max at 3.3V

• Deep power down mode

Pin arrangement (top view)

Logic block diagram

48-Fine Ball-Grid-Array Package

2M × 16

Array

(33,554,432)

I/ O8 UB

CS I/ O0

I/ O9 I/ O10 A5

I/ O11 A17

A6 I/ O1 I/ O2

A7 I/ O3 V_CC

V_CCI/ O12 DNU¹A16 I/ O4

I/ O0–I/ O7

I/ O8–I/ O15

I/ O

Control circuit

buffer

I/ O14 I/ O13 A14 A15 I/ O5 I/ O6

I/ O15 A19 A12 A13 WE I/ O7

A18 A8 A9 A10 A11 A20

Column decoder

ꢀꢁꢂꢃꢄꢁꢅꢁꢂꢆꢁꢃꢆꢇꢁꢄꢈꢉ

Column Addresses

Selection guide

V_CCRange

Typ

Power Dissipation

Operating (I_CC1Standby (I_SB1

)

Min

(V)

Max

(V)

Speed

(ns)

Product

(V)

3.0

Max (mA)

Max (µA)

100

AS3V2M16-55

AS3V2M16-70

AS3V2M16-85

2.7

3.3

100

10/ 17/ 02, V. 0.9.9

Alliance Semiconductor

P. 1 of 10

12 3 4 5 6 7...10

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