Datasheet > AS29F040CW-60/Q

AS29F040CW-60/Q

更新时间： 2024-02-17 12:14:28

品牌	Logo	应用领域
AUSTIN		内存集成电路
页数	文件大小	规格书
27页	1428K
描述
512K x 8 FLASH UNIFORM SECTOR 5.0V FLASH MEMORY

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技术参数
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AS29F040CW-60/Q 技术参数

是否Rohs认证：	不符合	生命周期：	Active
零件包装代码：	DIP	包装说明：	DIP, DIP32,.6
针数：	32	Reach Compliance Code：	compliant
ECCN代码：	3A001.A.2.C	HTS代码：	8542.32.00.51
风险等级：	5.52	Is Samacsys：	N
最长访问时间：	60 ns	命令用户界面：	YES
数据轮询：	YES	耐久性：	1000000 Write/Erase Cycles
JESD-30 代码：	R-CDIP-T32	长度：	42.418 mm
内存密度：	4194304 bit	内存集成电路类型：	FLASH
内存宽度：	8	功能数量：	1
部门数/规模：	8	端子数量：	32
字数：	524288 words	字数代码：	512000
工作模式：	SYNCHRONOUS	最高工作温度：	125 °C
最低工作温度：	-55 °C	组织：	512KX8
封装主体材料：	CERAMIC, METAL-SEALED COFIRED	封装代码：	DIP
封装等效代码：	DIP32,.6	封装形状：	RECTANGULAR
封装形式：	IN-LINE	并行/串行：	PARALLEL
峰值回流温度（摄氏度）：	NOT SPECIFIED	电源：	5 V
编程电压：	5 V	认证状态：	Not Qualified
筛选级别：	38535Q/M;38534H;883B	座面最大高度：	5.08 mm
部门规模：	64K	最大待机电流：	0.000005 A
子类别：	Flash Memories	最大压摆率：	0.04 mA
最大供电电压 (Vsup)：	5.5 V	最小供电电压 (Vsup)：	4.5 V
标称供电电压 (Vsup)：	5 V	表面贴装：	NO
技术：	CMOS	温度等级：	MILITARY
端子形式：	THROUGH-HOLE	端子节距：	2.54 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
切换位：	YES	类型：	NOR TYPE
宽度：	15.24 mm	Base Number Matches：	1

AS29F040CW-60/Q 数据手册

FLASH

AS29F040

Austin Semiconductor, Inc.

GENERAL DESCRIPTION

The AS29F040 is a 4Mbit, 5.0 Volt-only FLASH memory program pulse widths and verifies proper cell margin.

organized as 524,288 Kbytes of 8 bits each. The 512 Kbytes of

Device erasure occurs by executing the erase command

data are divided into eight sectors of 64 Kbytes each for flexible sequence. This invokes the Embedded Erase algorithm -- an

erase capability. The 8 bits of data appear on DQ0-DQ7. The internal algorithm that automatically preprograms the array (if it

device is designed to be programmed in-system with the is not already programmed) before executing the erase

operation. During erase, the device automatically times the

erase pulse widths and verifies proper cell margin.

The host system can detect whether a program or erase

operation is complete by reading the DQ7 (Data\Polling) and

DQ6 (toggle) status bits. After a program or erase cycle has

been completed, the device is ready to read array data or accept

another command.

The sector erase architecture allows memory sectors to be

erased and reprogrammed without affecting the data contents

of other sectors. The device is fully erased when shipped from

the factory.

standard system 5.0 Volt V_CCsupply. A 12.0 volt V_PPis not

required for write or erase operations. The device can also be

programmed in standard EPROM programmers.

This device is manufactured using 0.32 µm process

technology. In addition, it has a second toggle bit, DQ2, and

offers the ability to program in the Erase Suspend mode.

It is available with access times of 55, 60, ^+^+6=70, 90, 120,

and 150ns, allowing high-speed microprocessors to operate with-

out wait states. To eliminate bus contention the device has

separate chip enable (CE\), write enable (WE\), and output en-

able (OE\) controls.

The hardware data protection measures include a low V_CC

The device requires only a single 5.0 volt power supply for

both read and write functions. Internally generated and detector that automatically inhibits write operations during

regulated voltages are provided for the program and erase power transitions. The hardware sector protection feature

operations.

disables both program and erase operations in any

The device is entirely command set compatible with the combination of the sectors of memory. This can be achieved

JEDEC single-power-supply FLASH standard. Commands are via programming equipment.

written to the command register using standard microprocessor

The erase suspect feature enables the user to put erase on

write timings. Register contents serve as input to an internal hold for any period of time to read data from, or program data to,

state-machine that controls the erase and programming circuitry. any sector that is not selected for erasure. True background

Write cycles also internally latch addresses and data needed for erase can thus be achieved.

the programming and erase operations. Reading data out of the

device is similar to reading from other FLASH or EPROM Power consumption is greatly reduced in this mode. The

devices.

device electrically erases all bits within a sector simultaneously

The system can place the device into the standby mode.

Device programming occurs by executing the program via Fowler-Nordheim tunneling. The data is programmed using

command sequence. This invokes the Embedded Program hot electron injection.

algorithm -- an internal algorithm that automatically times the

PIN CONFIGURATION

LOGIC SYMBOL

DESCRIPTION

A0 - A18 Address Inputs

DQ0 - DQ7 Data Inputs/Outputs

CE\

OE\

WE\

Chip Enable

Output Enable

Write Enable

+5V Single Power Supply

Device Ground

AS29F040

AustinSemiconductor,Inc.reservestherighttochangeproductsorspecificationswithoutnotice.

Rev. 2.2 09/07

123 4 5 6 7...27

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与AS29F040CW-60/Q相关器件

型号	品牌	描述	获取价格	数据表
AS29F040CW-60/XT	AUSTIN	512K x 8 FLASH UNIFORM SECTOR 5.0V FLASH MEMORY	获取价格
AS29F040CW-70/883C	AUSTIN	512K x 8 FLASH UNIFORM SECTOR 5.0V FLASH MEMORY	获取价格
AS29F040CW-70/IT	AUSTIN	512K x 8 FLASH UNIFORM SECTOR 5.0V FLASH MEMORY	获取价格
AS29F040CW-70/MIL	MICROSS	Flash,	获取价格
AS29F040CW-70/Q	AUSTIN	512K x 8 FLASH UNIFORM SECTOR 5.0V FLASH MEMORY	获取价格
AS29F040CW-70/XT	AUSTIN	512K x 8 FLASH UNIFORM SECTOR 5.0V FLASH MEMORY	获取价格

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