Datasheet > ARG81800KESJSR

ARG81800KESJSR

更新时间： 2024-11-23 21:14:27

品牌	Logo	应用领域
急速微 - ALLEGRO		开关
页数	文件大小	规格书
42页	3874K
描述
Switching Regulator,

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中文翻译

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技术参数
数据手册

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ARG81800KESJSR 技术参数

生命周期：	Active	Reach Compliance Code：	compliant
风险等级：	5.73	模拟集成电路 - 其他类型：	SWITCHING REGULATOR
Base Number Matches：	1

ARG81800KESJSR 数据手册

ARG81800

40 V, 500 mA / 1.0 A Synchronous Buck Regulators

with Ultralow Quiescent Current, SYNC_IN, CLK_OUT, and PGOOD

FEATURES AND BENEFITS

DESCRIPTION

TheARG81800includesallthecontrolandprotectioncircuitry

to produce a PWM regulator with ±1.5% output voltage

accuracy,withultralowquiescentcurrenttoenable “keepalive”

supply operation with minimal current draw from the supply

during very light load regulation. There are two versions of

theARG81800 available, 500 mAand 1A, so the physical size

of the power components can be optimized for lower current

systems, thus reducing PCB area and saving cost. PWM

switching frequency can be programmed over a wide range to

balance efficiency, component sizing, and EMC performance.

If V_INdecays and the duty cycle reaches its maximum, the

ARG81800 will automatically fold back its PWM frequency

• Automotive AEC-Q100 qualified

• Input operating voltage range: 3.5 to 36 V

□ Withstands surge voltages to 40 V for load dump

• Low-Power (LP) mode—draws just 8 µA from V_INwhile

maintaining 3.3 or 5.0 V_OUT

• AUTO mode allows automatic transition between PWM

and LP mode based on load current

• Programmable PWM frequency (f_SW): 250 kHz to 2.4 MHz

• PWM frequency dithering and controlled switch node

slew rate reduce EMI/EMC signature

• CLK_OUTallows interleaving and dithering of “downstream”

regulators using their synchronization inputs

to extend the duty cycle and maintain V_OUT

• Interleaving minimizes input filter capacitor requirement

and improves EMI/EMC performance

• Synchronization of PWM frequency to external clock on

SYNC_INpin

• Adjustable output voltage: ±1.5% accuracy over

operating temperature range (‒40°C to 150°C)

• Maximized duty cycle at low V_INimproves dropout

• Soft recovery from dropout condition

The ARG81800 employs Low-Power (LP) mode to maintain

the output voltage at no load or very light load conditions while

drawing only micro-amps from V_IN. TheARG81800 includes a

PWM/AUTO control pin so the system can dynamically force

either PWM or AUTO mode by setting this pin high or low,

respectively.

IftheSYNC_INpinisdrivenbyanexternalclock,theARG81800

willbeforcedintoPWMmodeandsynchronizetotheincoming

clock.TheARG81800addsfrequencyditheringtotheSYNC_IN

clocktoreduceEMI/EMC.TheARG81800providesaCLK_OUT

pin so “downstream” regulators can be easily interleaved and

dithered via their synchronization inputs.

• Adjustable soft-start time controls inrush current to

accommodate a wide range of output capacitances

• External compensation provides flexibility to tune the

system for maximum stability or fast transient response

Continued on next page...

APPLICATIONS

• Infotainment

• Battery Powered Systems

• Industrial Systems

• Network and Telecom

• Home Audio

PACKAGE:

• Navigation Systems

• Instrument Clusters

• Audio Systems

20-pin, 4 mm × 4 mm,

QFN (ES) with wettable flank

Not to scale

• ADAS Applications

• HVAC Systems

3.5 to 36 V

1 µF

VIN

GND

BIAS

BOOT

0.1 µF

3.3 µH

PGND

3.3 V, 1 A

301 kΩ

20 µF

PWM/AUTO

95.3 kΩ

SYNC_IN

4.7 pF

10 kΩ

PGOOD

CLK_OUT

COMP

VREG

FSET

14.3 kΩ

f_SW= 2.15 MHz

2.2 nF

68 pF

22 nF

4.7 µF

40.2 kΩ

Typical Application Diagram

ARG81800-DS

MCO-0000676

June 11, 2019

12 3 4 5 6 7...42

中文翻译

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