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AN83C196JT

更新时间: 2024-11-25 13:05:35
品牌 Logo 应用领域
英特尔 - INTEL 微控制器
页数 文件大小 规格书
22页 137K
描述
Microcontroller, 16-Bit, MROM, 16MHz, CMOS, PQCC52, PLASTIC, LCC-52

AN83C196JT 技术参数

生命周期:Obsolete零件包装代码:LCC
包装说明:QCCJ,针数:52
Reach Compliance Code:unknownHTS代码:8542.31.00.01
风险等级:5.83Is Samacsys:N
具有ADC:YES地址总线宽度:16
位大小:16最大时钟频率:16 MHz
DAC 通道:NODMA 通道:NO
外部数据总线宽度:16JESD-30 代码:S-PQCC-J52
I/O 线路数量:56端子数量:52
最高工作温度:125 °C最低工作温度:-40 °C
PWM 通道:YES封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装形状:SQUARE
封装形式:CHIP CARRIER认证状态:Not Qualified
ROM可编程性:MROM速度:16 MHz
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子形式:J BEND端子位置:QUAD
uPs/uCs/外围集成电路类型:MICROCONTROLLERBase Number Matches:1

AN83C196JT 数据手册

 浏览型号AN83C196JT的Datasheet PDF文件第2页浏览型号AN83C196JT的Datasheet PDF文件第3页浏览型号AN83C196JT的Datasheet PDF文件第4页浏览型号AN83C196JT的Datasheet PDF文件第5页浏览型号AN83C196JT的Datasheet PDF文件第6页浏览型号AN83C196JT的Datasheet PDF文件第7页 
ADVANCE INFORMATION  
83C196LC, 83C196LD  
CHMOS 16-BIT MICROCONTROLLER  
Automotive  
22 MHz operation†  
High-speed event processor array  
— Six capture/compare channels  
— Two compare-only channels  
32 Kbytes of on-chip ROM (LC)  
16 Kbytes of on-chip ROM (LD)  
1 Kbyte of on-chip register RAM (LC)  
— Two 16-bit software timers  
384 bytes of on-chip register RAM (LD)  
Programmable 8- or 16-bit external bus  
512 bytes of on-chip code RAM  
(LC only)  
Design enhancements for EMI  
reduction  
Register-to-register architecture  
Oscillator failure detection circuitry  
Peripheral transaction server (PTS)  
with high-speed, microcoded interrupt  
service routines  
SFR register that indicates the source  
of the last reset  
Full-duplex serial I/O port with  
Watchdog timer (WDT)  
dedicated baud-rate generator  
Cost reduced replacements for the  
Enhanced full-duplex, synchronous  
87C196JT and 87C196JR.  
serial I/O port (SSIO)  
12 MHz standard; 18 MHz and 22 MHz are speed  
40° C to +125° C ambient temperature  
52-pin PLCC package  
premium  
NOTE  
This document contains information on products in the sampling and initial production  
phases of development. The specifications are subject to change without notice. Verify  
with your local Intel sales office that you have the latest datasheet before finalizing a  
design.  
The 83C196LC, 83C196LD are low-cost, pin-compatible replacements for the existing 87C196JT and  
87C196JR, respectively. These products feature an enhanced synchronous serial I/O (SSIO) port for more  
flexible communication to other devices. The enhanced SSIO is compatible with Motorola’s Serial Peripheral  
Interface (SPI) protocol and National’s Microwire protocol. To optimize die size, the A/D converter was  
removed for use in those applications that use an off-chip A/D converter.  
®
The MCS 96 microcontroller family members are all high-performance microcontrollers with 16-bit CPUs.  
The 83C196LC, 83C196LD are composed of a high-speed core with the following peripherals: an  
asynchronous/synchronous serial I/O port (8096 compatible) with a dedicated 16-bit baud-rate generator; an  
additional synchronous serial I/O port with full duplex master/slave transceivers; a flexible timer/counter  
structure with prescaler, cascading, and quadrature capabilities; six modularized, multiplexed high-speed I/O  
for capture and compare (called event processor array) with 200 ns resolution and double buffered inputs;  
and a sophisticated, prioritized interrupt structure with programmable peripheral transaction server (PTS).  
The 83C196LC has the highest memory density of the 52-pin MCS 96 microcontroller family, with 32 Kbytes  
of on-chip ROM, 1 Kbyte of on-chip register RAM, and 512 bytes of code RAM. The high memory integration  
of the 83C196LC supports high functionality in a low pin-count package and the use of the C programming  
language.  
COPYRIGHT © INTEL CORPORATION, 1996  
December 1996  
Order Number: 272805-001  

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