Datasheet > AN701

AN701

更新时间： 2022-11-25 11:11:34

品牌	Logo	应用领域
威世 - VISHAY		转换器开关控制器
页数	文件大小	规格书
20页	1116K
描述
Designing High-Frequency DC-to-DC Converters With the Si9114A Switchmode Controller

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AN701 数据手册

AN701

Vishay Siliconix

OUT

OSC

iDC

SENSE

Figure 12. Constant Frequency Current Mode Control

Waveform A has an ideal textbook appearance, but is in fact

rarely encountered. Waveforms B and C are typical yet close

to the threshold limit, and thus could lead to instability. The

addition of a simple RC network on the sensed waveform

suppresses this leading-edge spike. The low pass filter should

be selected so that only the leading-edge spike is suppressed

and the overall waveform is not distorted. The waveform must

contain a clean rising slope for the error amplifier to intersect.

If the RC time constant is too long, then the waveform will be

distorted and lead to falling-edge jitter on the turn-off edge.

S The current mode comparator needs more noise immunity,

and therefore has a deliberately slower delay time to block

out noise and spikes which are present on the leading

edge. Typical delay times should be around 100 ns.

S The peak current limiting comparator has the fastest

response time, since it is used only to protect the circuit in

the event of an overload. The delay times for this

comparator should be around 70 ns.

Slope compensation can also be used to eliminate noise or

jitter. A sample of the oscillator voltage is superimposed on the

error amplifier to produce a clean crossing of the thresholds

and to avoid any hunting.

HIGHĆFREQUENCY DESIGN

REQUIREMENTS

When designing converters for high switching frequency, a

certain discipline is required to determine the right choice of

components. This process should be an iterative choice and

the board layout should be properly planned before CAD

layout is undertaken.

The Si9114A has built-in leading-edge blanking/ suppression

to eliminate some of the effects of these spikes. The two

comparators used to operate the circuit have different delay

times as follows:

Figure 13 Current Waveforms

Figure 14 Current Sense Filtering Network

Document Number: 70575

16-Jan-01

www.vishay.com

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