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AN2407

更新时间: 2024-02-10 18:12:54
品牌 Logo 应用领域
飞思卡尔 - FREESCALE 解码器编码器
页数 文件大小 规格书
48页 371K
描述
Reed Solomon Encoder/Decoder on the StarCore SC140/SC1400 Cores, With Extended Examples

AN2407 技术参数

生命周期:Obsolete零件包装代码:QFP
包装说明:FQFP,针数:80
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.84商用集成电路类型:CONSUMER CIRCUIT
JESD-30 代码:S-PQFP-G80长度:12 mm
功能数量:1端子数量:80
封装主体材料:PLASTIC/EPOXY封装代码:FQFP
封装形状:SQUARE封装形式:FLATPACK, FINE PITCH
认证状态:Not Qualified座面最大高度:3.2 mm
最大供电电压 (Vsup):5.1 V最小供电电压 (Vsup):4.5 V
表面贴装:YES技术:BICMOS
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD宽度:12 mm
Base Number Matches:1

AN2407 数据手册

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AN2407  
Rev. 1, 12/2004  
Freescale Semiconductor  
Application Note  
Reed Solomon Encoder/Decoder on  
the StarCore™ SC140/SC1400 Cores,  
With Extended Examples  
By Jasmin Oz and Assaf Naor  
CONTENTS  
This application note describes the implementation of the Reed-  
Solomon error-control codes on the StarCore™ SC140 DSP  
core. Reed-Solomon codes are the preferred error-control  
coding procedures in a wide range of applications, such as  
ADSL, digital cellular phones, storage devices, and deep-space  
communications. Their popularity originates from their strong  
capability to correct both random and burst errors.  
1
2
Basics of Forward Error Correction (FEC) .............2  
Theory ..................................................................... 3  
2.1 Galois Fields ........................................................... 3  
2.2 Reed-Solomon Codes ..............................................6  
2.3 Error-Correcting Performance of  
Reed-Solomon Codes ..............................................9  
3
4
SC140 Core Overview ..........................................10  
Implementation on the SC140 Core.......................12  
The current trend for improving DSP-processing speed is to  
place multiple processor units on a single chip with an  
architecture that supports parallel execution. The StarCore  
SC140 family of DSPs exemplifies this trend. It has four data-  
arithmetic units (DALUs) and two address-generation units  
(AGUs). Code implementation for these processors should  
capitalize on their capabilities. This document describes the  
implementation of the Reed-Solomon encoder and decoder on  
the SC140 core. The document begins with a basic theoretical  
background on the Reed-Solomon algorithm and then discusses  
the implementation of the encoder and decoder. Little or no  
background on the subject is required.  
4.1 Polynomial Evaluation Over GF(256) .................. 13  
4.2 MAC Instructions Over Galois Fields ..................14  
4.3 Look-up Tables .....................................................14  
4.4 Lowest Cycle Count Limit for Polynomial  
Evaluation .............................................................15  
4.5 Cycle Count of the Reed-Solomon Routines ........16  
5
6
7
Results................................................................... 17  
Summary ............................................................... 19  
References .............................................................19  
© Freescale Semiconductor, Inc., 2003, 2004. All rights reserved.  

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