Datasheet > AMIS710401-A4

AMIS710401-A4

更新时间： 2024-01-02 05:42:55

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Image Sensor,

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AMIS710401-A4 技术参数

生命周期：	Transferred	Reach Compliance Code：	unknown
风险等级：	5.76	Base Number Matches：	1

AMIS710401-A4 数据手册

AMIS710401-A4: 400dpi CIS Module

Data Sheet

Red 600nm LED Light Source

11.0 Timing Characteristics at 25°C

The timing characteristics at 25°C for the I/O clocks are shown in Figure 5 and their definitions are detailed in Table 9.

Figure 5: Module Timing Diagram

Table 9: Timing Definitions

Item

Clock cycle time

Symbol

Min.

0.182

100

Typ.

Max.

2.9

730

Units

µs

Clock pulse width

Clock duty cycle

Prohibit crossing time of the SP⁽¹⁾

Data setup time

Data hold time

Signal delay time

Signal settling time

Note:

tprh

tds

tdh

tdl

tsh

(1) "Prohibit crossing of the SP", tprh, is to indicate that the start pulse should not be active high between two consecutive low going clock pulses. All falling clock

edges under an active high start pulse loads the internal shift register, therefore the start pulse must be active over only one falling clock edge. A high start pulse

crossing over any rising clock edges are ignored by the shift register. One simple way to ensure that the start pulse will not be actively high for any two consecutive

falling clock edges is to generate the start pulse on a rising clock edge and terminate it on the following rising clock edge.

AMI Semiconductor – Jun. 06, M-20589-001

www.amis.com

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