Datasheet > AM54BDS128AGBD9IS

AM54BDS128AGBD9IS

更新时间： 2024-11-16 21:09:31

品牌	Logo	应用领域
飞索 - SPANSION		静态存储器内存集成电路
页数	文件大小	规格书
71页	1179K
描述
Memory Circuit, 8MX16, CMOS, PBGA93, 10 X 10 MM, FPBGA-93

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AM54BDS128AGBD9IS 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	BGA	包装说明：	LFBGA,
针数：	93	Reach Compliance Code：	compliant
HTS代码：	8542.32.00.71	风险等级：	5.19
其他特性：	SRAM IS ORGANISED AS 1M X 16	JESD-30 代码：	S-PBGA-B93
JESD-609代码：	e0	长度：	10 mm
内存密度：	134217728 bit	内存集成电路类型：	MEMORY CIRCUIT
内存宽度：	16	功能数量：	1
端子数量：	93	字数：	8388608 words
字数代码：	8000000	工作模式：	ASYNCHRONOUS
最高工作温度：	85 °C	最低工作温度：	-40 °C
组织：	8MX16	封装主体材料：	PLASTIC/EPOXY
封装代码：	LFBGA	封装形状：	SQUARE
封装形式：	GRID ARRAY, LOW PROFILE, FINE PITCH	峰值回流温度（摄氏度）：	240
认证状态：	Not Qualified	座面最大高度：	1.4 mm
最大供电电压 (Vsup)：	1.95 V	最小供电电压 (Vsup)：	1.65 V
标称供电电压 (Vsup)：	1.8 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	TIN LEAD	端子形式：	BALL
端子节距：	0.8 mm	端子位置：	BOTTOM
处于峰值回流温度下的最长时间：	30	宽度：	10 mm
Base Number Matches：	1

AM54BDS128AGBD9IS 数据手册

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ADVANCE INFORMATION

Am54BDS128AG

Stacked Multi-Chip Package (MCP) Flash Memory and SRAM

Two Am29BDS640G 64 Megabit (4 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation,

Burst Mode Flash Memory and 16 Mbit (1 M x 16-Bit) Static RAM

DISTINCTIVE CHARACTERISTICS

■ Power dissipation (typical values, C_L= 30 pF)

MCP Features

■ Power supply voltage of 1.65 to 1.95 volt

— Burst Mode Read: 10 mA

— Simultaneous Operation: 25 mA

■ High performance

— Program/Erase: 15 mA

— Access time as fast as 70 ns/ 54 Mhz Burst

— Standby mode: 0.4 µA

■ Package

Hardware features

— 93-Ball FBGA

■ Software command sector locking

■ Operating Temperature

— –40°C to +85°C

■ Handshaking: host monitors operations via RDY

output

Flash Memory Features

■ Hardware reset input (RESET#)

■ WP# input

ARCHITECTURAL ADVANTAGES

— Write protect (WP#) function protects sectors 0, 1

(bottom boot) or sectors 132 and 133 (top boot),

regardless of sector protect status

■ Single 1.8 volt read, program and erase (1.65 to 1.95

volt)

■ Manufactured on 0.17 µm process technology

■ Simultaneous Read/Write operation

■ ACC input: Acceleration function reduces

programming time; all sectors locked when ACC = V_IL

— Data can be continuously read from one bank while

executing erase/program functions in other bank

■ CMOS compatible inputs, CMOS compatible outputs

■ Low V_CCwrite inhibit

— Zero latency between read and write operations

— Four bank architecture: 16Mb/16Mb/16Mb/16Mb

SOFTWARE FEATURES

■ Programmable Burst Interface

■ Supports Common Flash Memory Interface (CFI)

— 2 Modes of Burst Read Operation

— Linear Burst: 8, 16, and 32 words with wrap-around

— Continuous Sequential Burst

■ Software command set compatible with JEDEC 42.4

standards

■ Data# Polling and toggle bits

■ Erase Suspend/Resume

■ Sector Architecture

— Eight 8 Kword sectors and one hundred twenty-six 32

Kword sectors

— Suspends or resumes an erase operation in one

sector to read data from, or program data to, other

sectors

— Banks A and D each contain four 8 Kword sectors

and thirty-one 32 Kword sectors; Banks B and C

each contain thirty-two 32 Kword sectors

■ Unlock Bypass Program command

— Eight 8 Kword boot sectors, four at the top of the

address range, and four at the bottom of the address

range

— Reduces overall programming time when issuing

multiple program command sequences

SRAM Features

■ Power dissipation

■ Minimum 1 million erase cycle guarantee per sector

■ 20-year data retention at 125°C

— Operating: 3 mA maximum

— Standby: 15 µA maximum

PERFORMANCE CHARCTERISTICS

■ Read access times at 54/40 MHz

■ CE1s# and CE2s Chip Select

— Burst access times of 13.5/20 ns @ 30 pF at industrial

temperature range

■ Power down features using CE1s# and CE2s

■ Data retention supply voltage: 1.0 to 2.2 volt

— Asynchronous random access times of 70 ns (at 30

pF)

■ Byte data control: LB#s (DQ7–DQ0), UB#s

(DQ15–DQ8)

— Synchronous latency of 87.5/95 ns

Publication# 26628 Rev: A+1Amendment/+0

Issue Date: December 8, 2002

This document contains information on a product under development at Advanced Micro Devices. The information is intended to help you

evaluate this product. Do not design in this product without contacting the factory. AMD reserves the right to change or discontinue work

on this proposed product without notice.

Refer to AMD’s Website (www.amd.com) for the latest information.

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与AM54BDS128AGBD9IS相关器件

型号	品牌	获取价格	描述	数据表
AM54BDS128AGBD9IT	SPANSION	获取价格	Memory Circuit, 8MX16, CMOS, PBGA93, 10 X 10 MM, FPBGA-93
AM54BDS128AGTC8FS	SPANSION	获取价格	Memory Circuit, 8MX16, CMOS, PBGA93, 10 X 10 MM, FPBGA-93
AM54BDS128AGTC8FT	SPANSION	获取价格	Memory Circuit, 8MX16, CMOS, PBGA93, 10 X 10 MM, FPBGA-93
AM54BDS128AGTC8IS	SPANSION	获取价格	Memory Circuit, Flash+SRAM, 8MX16, CMOS, PBGA93, 10 X 10 MM, FPBGA-93
AM54BDS128AGTC8IT	SPANSION	获取价格	Memory Circuit, Flash+SRAM, 8MX16, CMOS, PBGA93, 10 X 10 MM, FPBGA-93
AM54BDS128AGTC9FS	SPANSION	获取价格	Memory Circuit, 8MX16, CMOS, PBGA93, 10 X 10 MM, FPBGA-93
AM54BDS128AGTC9FT	SPANSION	获取价格	Memory Circuit, 8MX16, CMOS, PBGA93, 10 X 10 MM, FPBGA-93
AM54BDS128AGTC9IS	SPANSION	获取价格	Memory Circuit, Flash+SRAM, 8MX16, CMOS, PBGA93, 10 X 10 MM, FPBGA-93
AM54BDS128AGTC9IT	SPANSION	获取价格	Memory Circuit, Flash+SRAM, 8MX16, CMOS, PBGA93, 10 X 10 MM, FPBGA-93
AM54BDS128AGTD8FS	SPANSION	获取价格	Memory Circuit, 8MX16, PBGA93, 10 X 10 MM, FPBGA-93

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