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AM29LV065DU121RWHKN PDF预览

AM29LV065DU121RWHKN

更新时间: 2024-12-02 03:36:31
品牌 Logo 应用领域
飞索 - SPANSION /
页数 文件大小 规格书
50页 979K
描述
Flash, 8MX8, 120ns, PBGA63, 11 X 12 MM, 0.80 MM PITCH, FBGA-63

AM29LV065DU121RWHKN 数据手册

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PRELIMINARY  
Am29LV065D  
64 Megabit (8 M x 8-Bit) CMOS 3.0 Volt-only  
Uniform Sector Flash Memory with VersatileI/O Control  
DISTINCTIVE CHARACTERISTICS  
Single power supply operation  
Compatibility with JEDEC standards  
— 3.0 to 3.6 volt read, erase, and program operations  
— Pinout and software compatible with single-power  
supply Flash  
VersatileI/O control  
— Superior inadvertent write protection  
— Device generates data output voltages and tolerates  
data input voltages as determined by the voltage on  
the VIO pin  
Minimum 1 million erase cycle guarantee per sector  
Package options  
— 48-pin TSOP  
High performance  
— Access times as fast as 90 ns  
— 63-ball FBGA  
Manufactured on 0.23 µm process technology  
CFI (Common Flash Interface) compliant  
Erase Suspend/Erase Resume  
— Suspends an erase operation to read data from, or  
program data to, a sector that is not being erased,  
then resumes the erase operation  
— Provides device-specific information to the system,  
allowing host software to easily reconfigure for  
different Flash devices  
Data# Polling and toggle bits  
— Provides a software method of detecting program or  
erase operation completion  
SecSi (Secured Silicon) Sector region  
— 256-byte sector for permanent, secure identification  
through an 16-byte random Electronic Serial Number  
Unlock Bypass Program command  
— May be programmed and locked at the factory or by  
the customer  
— Reduces overall programming time when issuing  
multiple program command sequences  
— Accessible through a command sequence  
Ready/Busy# pin (RY/BY#)  
Ultra low power consumption (typical values at 3.0 V,  
— Provides a hardware method of detecting program or  
erase cycle completion  
5 MHz)  
— 9 mA typical active read current  
— 26 mA typical erase/program current  
— 200 nA typical standby mode current  
Hardware reset pin (RESET#)  
— Hardware method to reset the device for reading array  
data  
Flexible sector architecture  
ACC pin  
— One hundred twenty-eight 64 Kbyte sectors  
— Accelerates programming time for higher throughput  
during system production  
Sector Protection  
— A hardware method to lock a sector to prevent  
program or erase operations within that sector  
Program and Erase Performance (VHH not applied to  
the ACC input pin)  
— Sectors can be locked in-system or via programming  
equipment  
— Byte program time: 5 µs typical  
— Sector erase time: 1.6 s typical for each 64 Kbyte  
sector  
Temporary Sector Unprotect feature allows code  
changes in previously locked sectors  
20-year data retention at 125°C  
Embedded Algorithms  
— Reliable operation for the life of the system  
— Embedded Erase algorithm automatically  
preprograms and erases the entire chip or any  
combination of designated sectors  
— Embedded Program algorithm automatically writes  
and verifies data at specified addresses  
Publication# 23544  
Issue Date: October 19, 2000  
Rev: A Amendment/+4  
This Data Sheet states AMD’s current technical specifications regarding the Products described herein. This Data  
Sheet may be revised by subsequent versions or modifications due to changes in technical specifications.  
Refer to AMD’s Website (www.amd.com) for the latest information.  

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