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AM29LV008B-120EEB PDF预览

AM29LV008B-120EEB

更新时间: 2024-02-07 02:00:54
品牌 Logo 应用领域
赛普拉斯 - CYPRESS /
页数 文件大小 规格书
39页 142K
描述
Flash Memory,

AM29LV008B-120EEB 技术参数

生命周期:Active包装说明:,
Reach Compliance Code:compliant风险等级:5.74
Base Number Matches:1

AM29LV008B-120EEB 数据手册

 浏览型号AM29LV008B-120EEB的Datasheet PDF文件第33页浏览型号AM29LV008B-120EEB的Datasheet PDF文件第34页浏览型号AM29LV008B-120EEB的Datasheet PDF文件第35页浏览型号AM29LV008B-120EEB的Datasheet PDF文件第36页浏览型号AM29LV008B-120EEB的Datasheet PDF文件第38页浏览型号AM29LV008B-120EEB的Datasheet PDF文件第39页 
P R E L I M I N A R Y  
ERASE AND PROGRAMMING PERFORMANCE  
Parameter  
Typ (Note 2)  
Max (Note 3)  
Unit  
s
Comments  
Sector Erase Time  
Chip Erase Time  
1
19  
9
15  
Excludes 00h programming  
prior to erasure (Note 4)  
s
Byte Programming Time  
Chip Programming Time  
300  
27  
µs  
s
Excludessystemleveloverhead  
(Note 5)  
9
Minimum 100,000 cycles  
guaranteed  
Erase/Program Endurance  
1,000,000  
cycles  
Notes:  
1. The typical program and erase times are considerably less than the maximum times since most bytes program or erase  
significantly faster than the worst case byte.The device enters the failure mode (DQ5=“1”) only after the maximum times given  
are exceeded. See the section on DQ5 for further information.  
2. Except for erase and program endurance, the typical program and erase times assume the following conditions: 25°C, 3.0 V  
V
, 100,000 cycles. Additionally, programming typicals assume checkerboard pattern.  
CC  
3. Under worst case conditions of 90˚C, V = 2.7 V, 100,000 cycles.  
CC  
4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.  
5. System-level overhead is the time required to execute the four-bus-cycle sequence for the program command. See Table 5  
for further information on command definitions.  
LATCHUP CHARACTERISTICS  
Min  
Max  
Input voltage with respect to V on all pins except I/O pins  
(including A9, OE, and RESET)  
SS  
-1.0 V  
13.0 V  
Input voltage with respect to V on all I/O pins  
-1.0 V  
V
+ 1.0 V  
SS  
CC  
V
Current  
-100 mA  
+100 mA  
CC  
Includes all pins except V . Test conditions: V = 3.0 V, one pin at a time.  
CC  
CC  
TSOP PIN CAPACITANCE (Notes 1–2)  
Parameter  
Symbol  
Parameter Description  
Input Capacitance  
Test Setup  
Typ  
6
Max  
7.5  
12  
Unit  
pF  
C
V
= 0  
IN  
IN  
C
Output Capacitance  
Control Pin Capacitance  
V
= 0  
8.5  
7.5  
pF  
OUT  
OUT  
C
V
= 0  
9
pF  
IN2  
IN  
Notes:  
1. Sampled, not 100% tested.  
2. Test conditions T = 25˚C, f = 1.0 MHz.  
A
Am29LV008T/Am29LV008B  
37  

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