PRELIMINARY
Am29F080
8 Megabit (1,048,576 x 8-Bit) CMOS 5.0 Volt-only,
Sector Erase Flash Memory
DISTINCTIVE CHARACTERISTICS
■ 5.0 Volt ±10% for read and write operations
— Minimizes system level power requirements
■ Compatible with JEDEC-standards
■ Embedded Program™ Algorithms
— Automatically programs and verifies data at
specified address
■ Data Polling andToggle Bit feature for detection
— Pinout and software compatible with
single-power-supply Flash
of program or erase cycle completion
■ Ready/Busy output (RY/BY)
— Superior inadvertent write protection
— Hardware method for detection of program or
erase cycle completion
■ Package Options
— 40-pin TSOP
■ Erase Suspend/Resume
— 44-pin PSOP
— Supports reading or programming data to a
■ Minimum 100,000 write/erase cycles guaranteed
■ High performance
sector not being erased
■ Low power consumption
— 85 ns maximum access time
■ Sector erase architecture
— Uniform sectors of 64 Kbytes each
— 30 mA maximum active read current
— 60 mA maximum program/erase current
■ Enhanced power management for standby
— Any combination of sectors can be erased.
Also supports full chip erase
mode
— <1 µA typical standby current
— Standard access time from standby mode
■ Hardware RESET pin
■ Group sector protection
— Hardware method that disables any combination
of sector groups from write or erase operations
(a sector group consists of 2 adjacent sectors of
64 Kbytes each)
— Resets internal state machine to the read mode
■ Embedded Erase™ Algorithms
— Automatically preprograms and erases the chip
or any sector
GENERAL DESCRIPTION
The Am29F080 is an 8 Mbit, 5.0 Volt-only Flash mem-
ory organized as 1 Megabyte of 8 bits. The 1 Mbyte of
data is divided into 16 sectors of 64 Kbytes for flexible
erase capability.The 8 bits of data will appear on DQ0–
DQ7. The Am29F080 is offered in a 40-pin TSOP, or
44-pin PSOP package. This device is designed to be
programmed in-system with the standard system
The standard Am29F080 offers access times of 85 ns,
90 ns, 120 ns, and 150 ns allowing operation of high-
speed microprocessors without wait states. To
eliminate bus contention the device has separate chip
enable (CE), write enable (WE), and output enable
(OE) controls.
The Am29F080 is entirely command set compatible
with the JEDEC single-power-supply Flash standard.
Commands are written to the command register using
standard microprocessor write timings. Register
contents serve as input to an internal state-machine
which controls the erase and programming circuitry.
Write cycles also internally latch addresses and data
5.0 volt V
supply. 12.0 volt V is not required for
CC
PP
program or erase operations. The device can also be
reprogrammed in standard EPROM programmers.
This document contains information on a product under development at Advanced Micro Devices. The information
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed
product without notice.
Publication# 19643 Rev: A Amendment/+1
Issue Date: April 1997