P R E L I M I N A R Y
TABLE OF CONTENTS
Distinctive Characteristics . . . . . . . . . . . . . . . . . . 1
General Description . . . . . . . . . . . . . . . . . . . . . . . . 2
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Connection Diagram . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 8
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . . 9
Table 1. Am29DL642G Device Bus Operations ................................9
Requirements for Reading Array Data ..................................... 9
Writing Commands/Command Sequences .............................. 9
Accelerated Program Operation ............................................. 10
Autoselect Functions .............................................................. 10
Simultaneous Read/Write Operations with Zero Latency ....... 10
Standby Mode ........................................................................ 10
Automatic Sleep Mode ........................................................... 10
RESET#: Hardware Reset Pin ............................................... 10
Output Disable Mode .............................................................. 11
Table 2. Am29DL642G Sector Architecture ....................................11
Table 4. Bank Address ....................................................................17
SecSiTM Sector Addresses............................................................. 17
Autoselect Mode ..................................................................... 17
Table 6. Am29DL642G Autoselect Codes, (High Voltage Method) 18
Sector/Sector Block Protection and Unprotection .................. 19
Table 7. Am29DL642G Boot Sector/Sector Block
Chip Erase Command Sequence ........................................... 28
Sector Erase Command Sequence ........................................ 28
Erase Suspend/Erase Resume Commands ...........................29
Figure 4. Erase Operation.............................................................. 29
Table 13. Am29DL642G Command Definitions.............................. 30
Write Operation Status . . . . . . . . . . . . . . . . . . . . 31
DQ7: Data# Polling ................................................................. 31
Figure 5. Data# Polling Algorithm .................................................. 31
RY/BY#: Ready/Busy# ............................................................ 32
DQ6: Toggle Bit I .................................................................... 32
Figure 6. Toggle Bit Algorithm........................................................ 32
DQ2: Toggle Bit II ................................................................... 33
Reading Toggle Bits DQ6/DQ2 ............................................... 33
DQ5: Exceeded Timing Limits ................................................ 33
DQ3: Sector Erase Timer ....................................................... 33
Table 14. Write Operation Status ................................................... 34
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 35
Figure 7. Maximum Negative Overshoot Waveform ...................... 35
Figure 8. Maximum Positive Overshoot Waveform........................ 35
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 9. ICC1 Current vs. Time (Showing Active and
Automatic Sleep Currents)............................................................. 37
Figure 10. Typical ICC1 vs. Frequency............................................ 37
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Figure 11. Test Setup.................................................................... 38
Figure 12. Input Waveforms and Measurement Levels ................. 38
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 39
Read-Only Operations ........................................................... 39
Figure 13. Read Operation Timings............................................... 39
Hardware Reset (RESET#) .................................................... 40
Figure 14. Reset Timings............................................................... 40
Erase and Program Operations .............................................. 41
Figure 15. Program Operation Timings.......................................... 42
Figure 16. Accelerated Program Timing Diagram.......................... 42
Figure 17. Chip/Sector Erase Operation Timings .......................... 43
Figure 18. Back-to-back Read/Write Cycle Timings ...................... 44
Figure 19. Data# Polling Timings (During Embedded Algorithms). 44
Figure 20. Toggle Bit Timings (During Embedded Algorithms)...... 45
Figure 21. DQ2 vs. DQ6................................................................. 45
Temporary Sector Unprotect .................................................. 46
Figure 22. Temporary Sector Unprotect Timing Diagram .............. 46
Figure 23. Sector/Sector Block Protect and
Addresses for Protection/Unprotection ...........................................19
Write Protect (WP#) ................................................................ 20
Table 8. WP#/ACC Modes ..............................................................20
Temporary Sector Unprotect .................................................. 20
Figure 1. Temporary Sector Unprotect Operation........................... 20
Figure 2. In-System Sector Protect/Unprotect Algorithms .............. 21
SecSi™ (Secured Silicon) Sector
Flash Memory Region ............................................................ 22
Hardware Data Protection ...................................................... 22
Low VCC Write Inhibit ............................................................ 22
Write Pulse “Glitch” Protection ............................................... 23
Logical Inhibit .......................................................................... 23
Power-Up Write Inhibit ............................................................ 23
Common Flash Memory Interface (CFI) . . . . . . .23
Table 9. CFI Query Identification String.......................................... 23
System Interface String................................................................... 24
Table 11. Device Geometry Definition ............................................ 24
Table 12. Primary Vendor-Specific Extended Query ...................... 25
Command Definitions . . . . . . . . . . . . . . . . . . . . . . 26
Reading Array Data ................................................................ 26
Reset Command ..................................................................... 26
Autoselect Command Sequence ............................................ 26
Enter SecSi™ Sector/Exit SecSi Sector
Unprotect Timing Diagram ............................................................. 47
Alternate CE# Controlled Erase and Program Operations ..... 48
Figure 24. Alternate CE# Controlled Write (Erase/Program)
Operation Timings.......................................................................... 49
Erase And Programming Performance . . . . . . . 50
Latchup Characteristics. . . . . . . . . . . . . . . . . . . . 50
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 51
FSD063—63-Ball Fine-Pitch Ball Grid Array (FBGA)
Command Sequence .............................................................. 26
Word Program Command Sequence ..................................... 27
Unlock Bypass Command Sequence ..................................... 27
Figure 3. Program Operation .......................................................... 28
10.95 x 11.95 mm package .................................................... 51
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 52
June 10, 2005
Am29DL642G
3