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AM29DL642G90I PDF预览

AM29DL642G90I

更新时间: 2024-02-17 11:28:49
品牌 Logo 应用领域
超微 - AMD /
页数 文件大小 规格书
54页 832K
描述
128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only Simultaneous Read/Write Flash Memo

AM29DL642G90I 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:BGA包装说明:10.95 X 11.95 MM, 0.80 MM PITCH, PLASTIC, FBGA-63
针数:63Reach Compliance Code:not_compliant
ECCN代码:3A991.B.1.AHTS代码:8542.32.00.51
风险等级:5.81最长访问时间:90 ns
启动块:BOTTOM/TOP命令用户界面:YES
通用闪存接口:YES数据轮询:YES
JESD-30 代码:R-PBGA-B63JESD-609代码:e0
长度:11.95 mm内存密度:134217728 bit
内存集成电路类型:FLASH MODULE内存宽度:16
湿度敏感等级:3功能数量:1
部门数/规模:16,126端子数量:63
字数:8388608 words字数代码:8000000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:8MX16
封装主体材料:PLASTIC/EPOXY封装代码:LFBGA
封装等效代码:BGA63,8X12,32封装形状:RECTANGULAR
封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH并行/串行:PARALLEL
峰值回流温度(摄氏度):240电源:3/3.3 V
编程电压:3.3 V认证状态:Not Qualified
就绪/忙碌:YES座面最大高度:1.4 mm
部门规模:4K,32K最大待机电流:0.00001 A
子类别:Flash Memories最大压摆率:0.045 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:BALL
端子节距:0.8 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:30切换位:YES
类型:NOR TYPE宽度:10.95 mm

AM29DL642G90I 数据手册

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P R E L I M I N A R Y  
TABLE OF CONTENTS  
Distinctive Characteristics . . . . . . . . . . . . . . . . . . 1  
General Description . . . . . . . . . . . . . . . . . . . . . . . . 2  
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4  
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Connection Diagram . . . . . . . . . . . . . . . . . . . . . . . . 6  
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 8  
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . . 9  
Table 1. Am29DL642G Device Bus Operations ................................9  
Requirements for Reading Array Data ..................................... 9  
Writing Commands/Command Sequences .............................. 9  
Accelerated Program Operation ............................................. 10  
Autoselect Functions .............................................................. 10  
Simultaneous Read/Write Operations with Zero Latency ....... 10  
Standby Mode ........................................................................ 10  
Automatic Sleep Mode ........................................................... 10  
RESET#: Hardware Reset Pin ............................................... 10  
Output Disable Mode .............................................................. 11  
Table 2. Am29DL642G Sector Architecture ....................................11  
Table 4. Bank Address ....................................................................17  
SecSiTM Sector Addresses............................................................. 17  
Autoselect Mode ..................................................................... 17  
Table 6. Am29DL642G Autoselect Codes, (High Voltage Method) 18  
Sector/Sector Block Protection and Unprotection .................. 19  
Table 7. Am29DL642G Boot Sector/Sector Block  
Chip Erase Command Sequence ........................................... 28  
Sector Erase Command Sequence ........................................ 28  
Erase Suspend/Erase Resume Commands ...........................29  
Figure 4. Erase Operation.............................................................. 29  
Table 13. Am29DL642G Command Definitions.............................. 30  
Write Operation Status . . . . . . . . . . . . . . . . . . . . 31  
DQ7: Data# Polling ................................................................. 31  
Figure 5. Data# Polling Algorithm .................................................. 31  
RY/BY#: Ready/Busy# ............................................................ 32  
DQ6: Toggle Bit I .................................................................... 32  
Figure 6. Toggle Bit Algorithm........................................................ 32  
DQ2: Toggle Bit II ................................................................... 33  
Reading Toggle Bits DQ6/DQ2 ............................................... 33  
DQ5: Exceeded Timing Limits ................................................ 33  
DQ3: Sector Erase Timer ....................................................... 33  
Table 14. Write Operation Status ................................................... 34  
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 35  
Figure 7. Maximum Negative Overshoot Waveform ...................... 35  
Figure 8. Maximum Positive Overshoot Waveform........................ 35  
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 36  
Figure 9. ICC1 Current vs. Time (Showing Active and  
Automatic Sleep Currents)............................................................. 37  
Figure 10. Typical ICC1 vs. Frequency............................................ 37  
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 38  
Figure 11. Test Setup.................................................................... 38  
Figure 12. Input Waveforms and Measurement Levels ................. 38  
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 39  
Read-Only Operations ........................................................... 39  
Figure 13. Read Operation Timings............................................... 39  
Hardware Reset (RESET#) .................................................... 40  
Figure 14. Reset Timings............................................................... 40  
Erase and Program Operations .............................................. 41  
Figure 15. Program Operation Timings.......................................... 42  
Figure 16. Accelerated Program Timing Diagram.......................... 42  
Figure 17. Chip/Sector Erase Operation Timings .......................... 43  
Figure 18. Back-to-back Read/Write Cycle Timings ...................... 44  
Figure 19. Data# Polling Timings (During Embedded Algorithms). 44  
Figure 20. Toggle Bit Timings (During Embedded Algorithms)...... 45  
Figure 21. DQ2 vs. DQ6................................................................. 45  
Temporary Sector Unprotect .................................................. 46  
Figure 22. Temporary Sector Unprotect Timing Diagram .............. 46  
Figure 23. Sector/Sector Block Protect and  
Addresses for Protection/Unprotection ...........................................19  
Write Protect (WP#) ................................................................ 20  
Table 8. WP#/ACC Modes ..............................................................20  
Temporary Sector Unprotect .................................................. 20  
Figure 1. Temporary Sector Unprotect Operation........................... 20  
Figure 2. In-System Sector Protect/Unprotect Algorithms .............. 21  
SecSi™ (Secured Silicon) Sector  
Flash Memory Region ............................................................ 22  
Hardware Data Protection ...................................................... 22  
Low VCC Write Inhibit ............................................................ 22  
Write Pulse “Glitch” Protection ............................................... 23  
Logical Inhibit .......................................................................... 23  
Power-Up Write Inhibit ............................................................ 23  
Common Flash Memory Interface (CFI) . . . . . . .23  
Table 9. CFI Query Identification String.......................................... 23  
System Interface String................................................................... 24  
Table 11. Device Geometry Definition ............................................ 24  
Table 12. Primary Vendor-Specific Extended Query ...................... 25  
Command Definitions . . . . . . . . . . . . . . . . . . . . . . 26  
Reading Array Data ................................................................ 26  
Reset Command ..................................................................... 26  
Autoselect Command Sequence ............................................ 26  
Enter SecSi™ Sector/Exit SecSi Sector  
Unprotect Timing Diagram ............................................................. 47  
Alternate CE# Controlled Erase and Program Operations ..... 48  
Figure 24. Alternate CE# Controlled Write (Erase/Program)  
Operation Timings.......................................................................... 49  
Erase And Programming Performance . . . . . . . 50  
Latchup Characteristics. . . . . . . . . . . . . . . . . . . . 50  
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 50  
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 51  
FSD063—63-Ball Fine-Pitch Ball Grid Array (FBGA)  
Command Sequence .............................................................. 26  
Word Program Command Sequence ..................................... 27  
Unlock Bypass Command Sequence ..................................... 27  
Figure 3. Program Operation .......................................................... 28  
10.95 x 11.95 mm package .................................................... 51  
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 52  
June 10, 2005  
Am29DL642G  
3

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