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AM29DL642G90I PDF预览

AM29DL642G90I

更新时间: 2024-01-12 03:21:03
品牌 Logo 应用领域
超微 - AMD /
页数 文件大小 规格书
54页 832K
描述
128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only Simultaneous Read/Write Flash Memo

AM29DL642G90I 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:BGA包装说明:10.95 X 11.95 MM, 0.80 MM PITCH, PLASTIC, FBGA-63
针数:63Reach Compliance Code:not_compliant
ECCN代码:3A991.B.1.AHTS代码:8542.32.00.51
风险等级:5.81最长访问时间:90 ns
启动块:BOTTOM/TOP命令用户界面:YES
通用闪存接口:YES数据轮询:YES
JESD-30 代码:R-PBGA-B63JESD-609代码:e0
长度:11.95 mm内存密度:134217728 bit
内存集成电路类型:FLASH MODULE内存宽度:16
湿度敏感等级:3功能数量:1
部门数/规模:16,126端子数量:63
字数:8388608 words字数代码:8000000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:8MX16
封装主体材料:PLASTIC/EPOXY封装代码:LFBGA
封装等效代码:BGA63,8X12,32封装形状:RECTANGULAR
封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH并行/串行:PARALLEL
峰值回流温度(摄氏度):240电源:3/3.3 V
编程电压:3.3 V认证状态:Not Qualified
就绪/忙碌:YES座面最大高度:1.4 mm
部门规模:4K,32K最大待机电流:0.00001 A
子类别:Flash Memories最大压摆率:0.045 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:BALL
端子节距:0.8 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:30切换位:YES
类型:NOR TYPE宽度:10.95 mm

AM29DL642G90I 数据手册

 浏览型号AM29DL642G90I的Datasheet PDF文件第1页浏览型号AM29DL642G90I的Datasheet PDF文件第2页浏览型号AM29DL642G90I的Datasheet PDF文件第4页浏览型号AM29DL642G90I的Datasheet PDF文件第5页浏览型号AM29DL642G90I的Datasheet PDF文件第6页浏览型号AM29DL642G90I的Datasheet PDF文件第7页 
Am29DL642G  
128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only  
Simultaneous Read/Write Flash Memory  
This product has been retired and is not recommended for designs. For new and current designs, S29PL127J supersedes AM29DL642G as the factory-recommended migration path.  
Please refer to the S29PL127J datasheet for specifications and ordering information. Availability of this document is retained for reference and historical purposes only.  
DISTINCTIVE CHARACTERISTICS  
Two 64 Megabit (Am29DL640G) in a single 63-ball 12  
x 11 mm Fine-pitch BGA package (features are  
described herein for each internal Am29DL640G)  
Flexible sector architecture  
Two hundred fifty-six 32 Kword sectors  
Compatibility with JEDEC standards  
Two Chip Enable inputs  
— Except for the added CE2#, the Fine-pitch BGA is  
pinout and software compatible with single-power  
supply Flash  
Two CE# inputs to control selection of each internal  
Am29DL640G devices  
Single power supply operation  
— Superior inadvertent write protection  
Minimum 1 million erase cycle guarantee per sector  
63-ball Fine-pitch BGA Package  
— 2.7 to 3.6 volt read, erase, and program operations  
Simultaneous Read/Write operations  
— Data can be continuously read from one bank while  
executing erase/program functions in another bank.  
SOFTWARE FEATURES  
— Zero latency between read and write operations  
Flexible BankTM architecture  
Data Management Software (DMS)  
— AMD-supplied software manages data programming,  
enabling EEPROM emulation  
— Read may occur in any of the three banks not being  
written or erased.  
— Eases historical sector erase flash limitations  
— Four banks may be grouped by customer to achieve  
desired bank divisions.  
Supports Common Flash Memory Interface (CFI)  
Erase Suspend/Erase Resume  
Boot Sectors  
— Suspends erase operations to allow reading from  
other sectors in same bank  
Top and bottom boot sectors in the same device  
— Any combination of sectors can be erased  
SecSi™ (Secured Silicon) SectorSecSiTM (Secured  
Data# Polling and Toggle Bits  
— Provides a software method of detecting the status of  
program or erase cycles  
Silicon) Sector: Extra 256 Byte sector  
Unlock Bypass Program command  
— Reduces overall programming time when issuing  
multiple program command sequences  
Factory locked and identifiable: 16 bytes available for  
secure, random factory Electronic Serial Number;  
verifiable as factory locked through autoselect  
function. ExpressFlash option allows entire sector to  
be available for factory-secured data  
HARDWARE FEATURES  
Ready/Busy# output (RY/BY#)  
— Hardware method for detecting program or erase  
cycle completion  
Customer lockable: One-time programmable only.  
Once locked, data cannot be changed  
High performance  
Hardware reset pin (RESET#)  
— Hardware method of resetting the internal state  
machine to the read mode  
— 70 or 90 ns access time  
Manufactured on 0.17 µm process technology  
CFI (Common Flash Interface) compliant  
WP#/ACC input pin  
— Write protect (WP#) function protects sectors 0, 1,  
140, and 141, regardless of sector protect status  
— Provides device-specific information to the system,  
allowing host software to easily reconfigure for  
different Flash devices  
— Acceleration (ACC) function accelerates program  
timing  
Ultra low power consumption (typical values at 3.0 V,  
Sector protection  
5 MHz) for the part  
— Hardware method of locking a sector, either  
in-system or using programming equipment, to  
prevent any program or erase operation within that  
sector  
— 10 mA typical active read current  
— 15 mA typical erase/program current  
— 400 nA typical standby mode current  
Temporary Sector Unprotect allows changing data in  
protected sectors in-system  
Publication# 26503  
Issue Date: June 10, 2005  
Rev: B Amendment/+2  
This Data Sheet states AMD’s current technical specifications regarding the Products described herein. This Data  
Sheet may be revised by subsequent versions or modifications due to changes in technical specifications.  
Refer to AMD’s Website (www.amd.com) for the latest information.  

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