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AM29BDS640GT78WSF PDF预览

AM29BDS640GT78WSF

更新时间: 2024-11-21 03:48:47
品牌 Logo 应用领域
飞索 - SPANSION /
页数 文件大小 规格书
62页 863K
描述
Flash, 4MX16, 13.5ns, PBGA80, 11 X 12 MM, FBGA-80

AM29BDS640GT78WSF 数据手册

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ADVANCE INFORMATION  
Am29BDS640G  
64 Megabit (4 M x 16-Bit)  
CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory  
DISTINCTIVE CHARACTERISTICS  
Power dissipation (typical values, CL = 30 pF)  
— Burst Mode Read: 10 mA  
ARCHITECTURAL ADVANTAGES  
Single 1.8 volt read, program and erase (1.65 to 1.95  
— Simultaneous Operation: 25 mA  
— Program/Erase: 15 mA  
volt)  
Manufactured on 0.17 µm process technology  
Enhanced VersatileIO™ (VIO) Feature  
— Standby mode: 0.2 µA  
— Device generates data output voltages and tolerates  
data input voltages as determined by the voltage on  
the VIO pin  
HARDWARE FEATURES  
Sector Protection  
— Software command sector locking  
— 1.8V and 3V compatible I/O signals  
Handshaking feature available  
Simultaneous Read/Write operation  
— Provides host system with minimum possible latency  
by monitoring RDY  
— Data can be continuously read from one bank while  
executing erase/program functions in other bank  
Hardware reset input (RESET#)  
— Zero latency between read and write operations  
— Four bank architecture: 16Mb/16Mb/16Mb/16Mb  
— Hardware method to reset the device for reading array  
data  
Programmable Burst Interface  
WP# input  
— 2 Modes of Burst Read Operation  
— Linear Burst: 8, 16, and 32 words with wrap-around  
— Continuous Sequential Burst  
— Write protect (WP#) function protects sectors 0 and 1  
(bottom boot), or sectors 132 and 133 (top boot),  
regardless of sector protect status  
Sector Architecture  
ACC input: Acceleration function reduces  
programming time; all sectors locked when ACC = VIL  
— Eight 8 Kword sectors and one hundred twenty-six 32  
Kword sectors  
CMOS compatible inputs, CMOS compatible outputs  
Low VCC write inhibit  
— Banks A and D each contain four 8 Kword sectors  
and thirty-one 32 Kword sectors; Banks B and C  
each contain thirty-two 32 Kword sectors  
SOFTWARE FEATURES  
— Eight 8 Kword boot sectors, four at the top of the  
address range, and four at the bottom of the address  
range  
Supports Common Flash Memory Interface (CFI)  
Software command set compatible with JEDEC 42.4  
standards  
Minimum 1 million erase cycle guarantee per sector  
20-year data retention at 125°C  
— Backwards compatible with Am29F and Am29LV  
families  
— Reliable operation for the life of the system  
Data# Polling and toggle bits  
80-ball FBGA package  
— Provides a software method of detecting program  
and erase operation completion  
PERFORMANCE CHARCTERISTICS  
Erase Suspend/Resume  
Read access times at 54/40 MHz  
— Suspends an erase operation to read data from, or  
program data to, a sector that is not being erased,  
then resumes the erase operation  
— Burst access times of 13.5/20 ns @ 30 pF at  
industrial temperature range  
— Asynchronous random access times of 70 ns (at 30  
pF)  
Unlock Bypass Program command  
— Reduces overall programming time when issuing  
multiple program command sequences  
— Synchronous latency of 87.5/95 ns with 1.8 V VIO, and  
88.0/95 ns with 3.0 V VIO (at 30 pF)  
Publication# 25903 Rev: A Amendment+4  
Issue Date: July 26, 2002  
This document contains information on a product under development at Advanced Micro Devices. The information  
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed  
product without notice.  
Refer to AMD’s Website (www.amd.com) for the latest information.  

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