FINAL
Am27C256
256 Kilobit (32 K x 8-Bit) CMOS EPROM
DISTINCTIVE CHARACTERISTICS
■ Fast access time
■ Latch-up protected to 100 mA from –1 V to
VCC + 1 V
— Speed options as fast as 45 ns
■ Low power consumption
■ High noise immunity
■ Versatile features for simple interfacing
— Both CMOS and TTL input/output compatibility
— Two line control functions
— 20 µA typical CMOS standby current
■ JEDEC-approved pinout
■ Single +5 V power supply
■ Standard 28-pin DIP, PDIP, and 32-pin PLCC
■ ±10% power supply tolerance standard
■ 100% Flashrite™ programming
— Typical programming time of 4 seconds
packages
GENERAL DESCRIPTION
The Am27C256 is a 256-Kbit, ultraviolet erasable pro-
grammable read-only memory. It is organized as 32K
words by 8 bits per word, operates from a single +5 V
supply, has a static standby mode, and features fast
single address location programming. Products are
available in windowed ceramic DIP packages, as well
as plastic one time programmable (OTP) PDIP and
PLCC packages.
thus eliminating bus contention in a multiple bus micro-
processor system.
AMD’s CMOS process technology provides high
speed, low power, and high noise immunity. Typical
power consumption is only 80 mW in active mode, and
100 µW in standby mode.
All signals are TTL levels, including programming sig-
nals. Bit locations may be programmed singly, in
blocks, or at random. The device supports AMD’s
Flashrite programming algorithm (100 µs pulses), re-
sulting in a typical programming time of 4 seconds.
Data can be typically accessed in less than 55 ns, al-
lowing high-performance microprocessors to operate
without any WAIT states. The device offers separate
Output Enable (OE#) and Chip Enable (CE#) controls,
BLOCK DIAGRAM
V
Data Outputs
DQ0–DQ7
CC
V
V
SS
PP
Output Enable
Chip Enable
and
OE#
CE#
Output
Buffers
Prog Logic
Y
Y
Gating
Decoder
A0–A14
Address
Inputs
262,144
Bit Cell
Matrix
X
Decoder
08007I-1
Publication# 08007 Rev: I Amendment/0
Issue Date: May 1998