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AM27C020-55JC5 PDF预览

AM27C020-55JC5

更新时间: 2024-11-29 22:56:31
品牌 Logo 应用领域
超微 - AMD 内存集成电路可编程只读存储器OTP只读存储器电动程控只读存储器
页数 文件大小 规格书
12页 165K
描述
2 Megabit (256 K x 8-Bit) CMOS EPROM

AM27C020-55JC5 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QFJ包装说明:QCCJ, LDCC32,.5X.6
针数:32Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.71
风险等级:5.88Is Samacsys:N
最长访问时间:55 nsI/O 类型:COMMON
JESD-30 代码:R-PQCC-J32JESD-609代码:e0
内存密度:2097152 bit内存集成电路类型:OTP ROM
内存宽度:8功能数量:1
端子数量:32字数:262144 words
字数代码:256000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:256KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC32,.5X.6封装形状:RECTANGULAR
封装形式:CHIP CARRIER并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
认证状态:Not Qualified最大待机电流:0.0001 A
子类别:OTP ROMs最大压摆率:0.03 mA
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIEDBase Number Matches:1

AM27C020-55JC5 数据手册

 浏览型号AM27C020-55JC5的Datasheet PDF文件第2页浏览型号AM27C020-55JC5的Datasheet PDF文件第3页浏览型号AM27C020-55JC5的Datasheet PDF文件第4页浏览型号AM27C020-55JC5的Datasheet PDF文件第5页浏览型号AM27C020-55JC5的Datasheet PDF文件第6页浏览型号AM27C020-55JC5的Datasheet PDF文件第7页 
FINAL  
Am27C020  
2 Megabit (256 K x 8-Bit) CMOS EPROM  
DISTINCTIVE CHARACTERISTICS  
Fast access time  
Single +5 V power supply  
— Speed options as fast as 55 ns  
Low power consumption  
±10% power supply tolerance standard  
100% Flashrite™ programming  
Typical programming time of 32 seconds  
— 100 µA maximum CMOS standby current  
JEDEC-approved pinout  
Latch-up protected to 100 mA from –1 V to  
VCC + 1 V  
— Plug in upgrade of 1 Mbit EPROM  
— Easy upgrade from 28-pin JEDEC EPROMs  
High noise immunity  
Compact 32-pin DIP, PDIP, and PLCC packages  
GENERAL DESCRIPTION  
The Am27C020 is a 2 Megabit, ultraviolet erasable pro-  
grammable read-only memory. It is organized as 256  
Kwords by 8 bits per word, operates from a single +5 V  
supply, has a static standby mode, and features fast  
single address location programming. Products are  
available in windowed ceramic DIP packages, as well  
as plastic one time programmable (OTP) PDIP and  
PLCC packages.  
thus eliminating bus contention in a multiple bus micro-  
processor system.  
AMD’s CMOS process technology provides high  
speed, low power, and high noise immunity. Typical  
power consumption is only 100 mW in active mode,  
and 100 µW in standby mode.  
All signals are TTL levels, including programming sig-  
nals. Bit locations may be programmed singly, in  
blocks, or at random. The device supports AMD’s  
Flashrite programming algorithm (100 µs pulses), re-  
sulting in a typical programming time of 32 seconds.  
Data can be typically accessed in less than 55 ns, al-  
lowing high-performance microprocessors to operate  
without any WAIT states. The device offers separate  
Output Enable (OE#) and Chip Enable (CE#) controls,  
BLOCK DIAGRAM  
V
Data Outputs  
DQ0–DQ7  
CC  
V
V
SS  
PP  
Output Enable  
Chip Enable  
and  
OE#  
CE#  
Output  
Buffers  
Prog Logic  
PGM#  
Y
Y
Gating  
Decoder  
A0–A17  
Address  
Inputs  
2,097,152  
Bit Cell  
Matrix  
X
Decoder  
11507H-1  
Publication# 11507 Rev: H Amendment/0  
Issue Date: May 1998  

AM27C020-55JC5 替代型号

型号 品牌 替代类型 描述 数据表
MX27C2000QC-55 Macronix

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