[AK7722]
■ Block Diagram
2
LFLT
XTO
DVDD
VSS2
pull down
Hi-z
2
Open Drain
3
3
AVDD
VSS3
XTI
VCOM
REF
LDO
BICKI
AVDRV
LRCKI
TESTI1
TESTI2
CLKGEN & CONT
DVOL
ADC2
IRESETN
A2INL,A2INR
2
2
SDOUTAD2
CLKOE
ASEL[2:0]
CLKO
BICKO
LRCKO
AIN6L,AIN6R
AIN5L,AIN5R
5
4
3
2
ADC1
DVOL
BICKOE
LRCKOE
2
2
2
SDOUTAD1
AIN4L,AIN4R
AIN3L,AIN3R
SELDI5
1
0
DIN5
AIN2LP,AIN2LN
AIN2RP,AIN2RN
AIN1LP,AIN1LN
AIN1RP,AIN1RN
SDIN5
GBICKI
GLRCKI
1
0
4
4
MUX1
GSRC
MUX[2:0]
AOUT2LP
AOUT2LN
DVOL DAC2
SELDO5[1:0]
0
1
DOUT5
DOUT4
SELDI4
0
1
AOUT2RP
AOUT2RN
SRIN2
DIN4
2
3
SDINDA2
DSEL[1:0]
SRIN3,SRBICK3
MUX2[2:0]
SRC
DSP
SRLRCK3
3
2
AOUT1LP
AOUT1LN
DVOL DAC1
SRCBICKI
SRCLRCKI
SRIN2,SRBICK2
0
MUX2
3
3
1
0
SRLRCK2
AOUT1RP
AOUT1RN
1
2
3
SRCI
SDINDA1
SRIN1,SRBICK1
SRLRCK1
SELDO4[1:0]
SRCLFLT
SRCLFLT
UNLOCK
UNLOCK
SRCO
DOUT3
IRPT
0
OUT3E
1
2
3
SDOUT3 / IRPT
SELDI3
0
1
SRIN1
DIN3
SELDO3[1:0]
DOUT2
0
SDIN1
DIN1
DIN2
OUT2E
1
2
3
SDOUT2
SDIN2 / JX1
SELDO2[1:0]
JX1E
JX2E
JX1
JX0
JX0
0
DOUT1
GP0
OUT1E
1
2
3
SDOUT1 / GP0
SRIN3
JX2
SELDO1[1:0]
WDTEN
CRCE
WDT
CRC
RDY
SO
RDY
SO
STO
GP1
MICIF
I2CSEL
RQN / CAD1
SI / CAD0
GP1
SCLK / SCL
SDA
Figure 1. Block Diagram
* Figure 1 shows a simplified diagram of the AK7722, which is not the perfect same as the actual circuit diagram.
MS1328-E-00-PB
- 3 -
2011/09