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AK5574EN PDF预览

AK5574EN

更新时间: 2022-02-26 13:47:54
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AKM /
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68页 2036K
描述
4-Channel Differential 32-bit ΔΣ ADC

AK5574EN 数据手册

 浏览型号AK5574EN的Datasheet PDF文件第5页浏览型号AK5574EN的Datasheet PDF文件第6页浏览型号AK5574EN的Datasheet PDF文件第7页浏览型号AK5574EN的Datasheet PDF文件第9页浏览型号AK5574EN的Datasheet PDF文件第10页浏览型号AK5574EN的Datasheet PDF文件第11页 
[AK5574]  
6. Absolute Maximum Ratings  
Symbol  
(VSS= 0 V; Note 3)  
Parameter  
Power  
Min.  
0.3  
0.3  
0.3  
-
Max.  
6.0  
4.0  
2.5  
±10  
Unit  
V
V
V
mA  
V
Analog (AVDD pin)  
Digital Interface (TVDD pin)  
AVDDam  
TVDDam  
Supplies:  
Digital Core (VDD18 pin)(Note 4) VDD18am  
Input Current (Any Pin Except Supplies)  
Analog Input Voltage (AIN1-4P, AIN1-4N pins)  
Digital Input Voltage  
IIN  
VINA  
VIND  
0.3  
0.3  
AVDD+0.3  
TVDD+0.3  
V
Ambient Temperature (Power applied)  
When the back tab is connected to VSS  
When the back tab is open  
Ta  
Ta  
Tstg  
40  
40  
65  
105  
70  
150  
°C  
°C  
°C  
Storage Temperature  
Note 3. All voltages with respect to ground.  
Note 4. The 1.8 V LDO is off (LDOE pin = “L”) and an external power is supplied to the VDD18 pin.  
WARNING: Operation at or beyond these limits may result in permanent damage to the device.  
Normal operation is not guaranteed at these extremes.  
7. Recommended Operation Conditions  
(VSS=0V; Note 3)  
Parameter  
Symbol  
Min.  
Typ.  
Max.  
Unit  
Analog (AVDD pin)  
AVDD  
4.75  
5.0  
5.25  
V
(LDOE pin= “L”) (Note 5)  
Digital Interface (TVDD pin) (Note 6)  
Digital Core (VDD18 pin)  
Power  
Supplies  
TVDD  
VDD18  
1.7  
1.7  
1.8  
1.8  
1.98  
1.98  
V
V
(LDOE pin= “H”) (Note 7)  
Digital Interface (TVDD pin)  
TVDD  
3.0  
3.3  
5.0  
3.6  
V
V
Voltage  
Reference  
(Note 11)  
“H” voltage Reference (Note 8)  
“L” voltage reference  
VREFH1-2  
4.75  
5.25  
VREFL1-2  
-
AVSS  
-
V
Note 3. All voltages with respect to ground.  
Note 5. TVDD pin must be powered up before VDD18 pin when the LDOE pin = “L”. The power up  
sequence between AVDD pin and TVDD pin or between AVDD pin and VDD18 pin is not critical.  
Note 6. TVDD must not exceed VDD18±0.1 V when LDOE pin= “L”.  
Note 7. When LDOE pin = “H”, the internal LDO supplies 1.8 V (typ). The power up sequences between  
AVDD pin and TVDD pin is not critical.  
Note 8. VREFH1-2 must not exceed AVDD+0.1 V.  
Note 9. VREFL1-2 must be connected to AVSS.  
Analog Input Voltage is proportional to {(VREFH) – (VREFL)}.  
Vin (typ, @ 0dB) = ±2.8 × {(VREFH) – (VREFL)} / 5 [V].  
* AKM assumes no responsibility for the usage beyond the conditions in this data sheet.  
015016764-E-00  
2015/12  
- 8 -  
 
 
 
 
 
 

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