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ADV7185KST PDF预览

ADV7185KST

更新时间: 2024-11-23 22:18:23
品牌 Logo 应用领域
亚德诺 - ADI 解码器
页数 文件大小 规格书
41页 728K
描述
Professional NTSC/PAL Video Decoder with 10-Bit CCIR656 Output

ADV7185KST 数据手册

 浏览型号ADV7185KST的Datasheet PDF文件第2页浏览型号ADV7185KST的Datasheet PDF文件第3页浏览型号ADV7185KST的Datasheet PDF文件第4页浏览型号ADV7185KST的Datasheet PDF文件第5页浏览型号ADV7185KST的Datasheet PDF文件第6页浏览型号ADV7185KST的Datasheet PDF文件第7页 
Professional NTSC/PAL Video Decoder  
with 10-Bit CCIR656 Output  
a
ADV7185  
FEATURES  
Digital Output Formats (20-Bit Wide Bus):  
YCrCb (4:2:2 or 4:1:1)  
Analog Video to Digital YCrCb Video Decoder:  
NTSC-(M/N), PAL-(B/D/G/H/I/M/N)  
ADV®7185 Integrates Two 12-Bit ADCs  
Clocked from a Single 27 MHz Crystal  
Dual Video Clocking Schemes:  
CCIR601/CCIR656 8-Bit or Extended 10-Bit  
0.5 V to 2.0 V p-p Input Range  
Differential Gain, 0.4% Typ  
Differential Phase, 0.6o Typ  
Line-Locked Clock Compatible (LLC)  
Adaptive Digital Line Length Tracking (ADLLT™)  
3-Line Chroma Comb Filter  
Programmable Video Controls:  
Peak White/Hue/Brightness/Saturation/Contrast  
CCIR/Square/4 FSC Pixel Operation  
Real-Time Clock and Status Information Output  
APPLICATIONS  
Projectors  
Digital TVs  
DVD-RAM Recorders and Players  
PDP Displays  
Video Decoders  
Hybrid Analog/Digital Set-Top Boxes  
Professional Equipment  
Integrated AGC (Automatic Gain Control) and Clamping  
Multiple Programmable Analog Input Formats:  
CVBS (Composite Video)  
SVHS (Y/C)  
YCrCb Component (VESA, MII, SMPTE, and BetaCam)  
6 Analog Input Video Channels  
Real-Time Horizontal and Vertical Scaling  
Automatic NTSC/PAL Identification  
Differential Mode Video Input  
(continued on page 9)  
FUNCTIONAL BLOCK DIAGRAM  
P19–P0  
PIXEL  
O/P PORT  
ADV7185  
RESAMPLING  
AND  
HORIZONTAL  
SCALING  
SHAPING  
LUMA  
DELAY  
BLOCK  
PEAKING  
HPF/LPF  
AFF  
AND  
ISO  
REFOUT  
AIN1  
NOTCH LPF  
HFF/QCLK  
AEF  
FIFO CONTROL  
BLOCK  
LUMA  
ANTIALIAS  
LPF  
12-BIT  
ADC  
SYNC  
DETECTION  
AND  
2H LINE  
MEMORY  
PIXEL  
OUTPUT  
FORMATTER  
DV  
ANALOG I/P  
MULTIPLEXING  
AIN2  
RD  
AUTOMATIC  
GAIN  
CONTROL  
(AGC)  
AIN3  
SUB-  
CARRIER  
RECOVERY  
DTO  
RESAMPLING  
AND  
HORIZONTAL  
SCALING  
CHROMA  
COMB  
FILTER  
27MHz  
OE  
AIN4  
GL/CLKIN  
LLC1  
CLAMP AND  
DC RESTORE  
AIN5  
CHROMA  
ANTIALIAS  
LPF  
SHAPING  
LPF  
12-BIT  
ADC  
LLC  
SWITCH  
AIN6  
SYNTHESIS  
WITH LINE-  
LOCKED  
OUTPUT  
CLOCK  
LLC2  
LLCREF  
27MHz XTAL  
2
VIDEOTIMING AND  
CONTROL BLOCK  
I C-COMPATIBLE  
INTERFACE PORT  
OSCILLATOR  
BLOCK  
ELPF  
HSYNC FIELD VSYNC HREF VREF  
CLOCK  
RESET SDATA SCLOCK ALSB  
CLOCK  
PWRDN  
ADLLT is a trademark and ADV is a registered trademark of Analog Devices, Inc.  
REV. 0  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat  
may result from its use. No license is granted by implication or otherwise  
under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
www.analog.com  
© Analog Devices, Inc., 2002  

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