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ADuM7642CRQZ PDF预览

ADuM7642CRQZ

更新时间： 2024-02-16 19:56:49
品牌 Logo 应用领域
亚德诺 - ADI 驱动程序和接口接口集成电路PC
页数 文件大小 规格书
20页 392K
描述
1 kV RMS Six-Channel Digital Isolators

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中文翻译

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ADuM7642CRQZ 技术参数

是否无铅：含铅是否Rohs认证：符合
生命周期：Active包装说明：SSOP,
针数：20Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8543.70.99.60
风险等级：1.57Samacsys Confidence：4
Samacsys Status：ReleasedSamacsys PartID：421531
Samacsys Pin Count：20Samacsys Part Category：Integrated Circuit
Samacsys Package Category：Small Outline PackagesSamacsys Footprint Name：QSOP-20
Samacsys Released Date：2018-08-06 07:19:52Is Samacsys：N
接口集成电路类型：INTERFACE CIRCUITJESD-609代码：e3
长度：8.66 mm湿度敏感等级：1
功能数量：1最高工作温度：105 °C
最低工作温度：-40 °C封装代码：SSOP
峰值回流温度（摄氏度）：260座面最大高度：1.75 mm
最大供电电压：5.5 V最小供电电压：3 V
标称供电电压：3.3 V温度等级：INDUSTRIAL
端子面层：Matte Tin (Sn)端子节距：0.64 mm
处于峰值回流温度下的最长时间：30宽度：3.91 mm
Base Number Matches：1

ADuM7642CRQZ 数据手册

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Data Sheet  
ADuM7640/ADuM7641/ADuM7642/ADuM7643  
APPLICATIONS INFORMATION  
PRINTED CIRCUIT BOARD LAYOUT  
PROPAGATION DELAY-RELATED PARAMETERS  
Propagation delay is a parameter that describes the time it takes  
a logic signal to propagate through a component. The input-to-  
output propagation delay time for a high-to-low transition may  
differ from the propagation delay time for a low-to-high transition.  
The ADuM7640/ADuM7641/ADuM7642/ADuM7643 digital  
isolators require no external interface circuitry for the logic  
interfaces. Power supply bypassing is strongly recommended at the  
input and output supply pins (see Figure 20). Connect four bypass  
capacitors between Pin 1 and Pin 2 for VDD1A, between Pin 7 and  
Pin 10 for VDD1B, between Pin 11 and Pin 14 for VDD2B, and between  
Pin 19 and Pin 20 for VDD2A. Connect the VDD1A supply pin and the  
INPUT (V  
)
50%  
Ix  
tPLH  
tPHL  
OUTPUT (V  
)
V
V
DD1B supply pin together, and connect the VDD2B supply pin and  
DD2A supply pin together. The capacitor values should be from  
50%  
Ox  
Figure 21. Propagation Delay Parameters  
0.01 µF to 0.1 µF. The total lead length between both ends of the  
capacitor and the power supply pin should not exceed 20 mm.  
Pulse width distortion is the maximum difference between these  
two propagation delay values and is an indication of how accurately  
the timing of the input signal is preserved.  
V
GND  
V
DD1A  
DD2A  
GND  
1
IA  
IB  
2
V
V
V
V
V
V
V
V
V
OA  
OB  
/V  
OC IC  
Channel-to-channel matching refers to the maximum amount  
of time that the propagation delay differs between channels  
within a single ADuM7640/ADuM7641/ADuM7642/ADuM7643  
component.  
V
V
/V  
IC OC  
/V  
ID OD  
V
/V  
OD ID  
DD1B  
/V  
DD2B  
V
/V  
IE OE  
OE IE  
V
IF  
GND  
OF  
GND  
1
2
Propagation delay skew refers to the maximum amount of time  
that the propagation delay differs between multiple ADuM7640/  
ADuM7641/ADuM7642/ADuM7643 components operating  
under the same conditions.  
Figure 20. Recommended Printed Circuit Board Layout  
In applications involving high common-mode transients, it is  
important to minimize board coupling across the isolation barrier.  
Furthermore, users should design the board layout so that any  
coupling that occurs affects all pins equally on a given component  
side. Failure to follow this design guideline can cause voltage  
differentials between pins that exceed the absolute maximum  
ratings of the device, which can lead to latch-up or permanent  
damage.  
DC CORRECTNESS  
Positive and negative logic transitions at the isolator input  
cause narrow (~1 ns) pulses to be sent to the decoder using the  
transformer. The decoder is bistable and is, therefore, either set  
or reset by the pulses, indicating input logic transitions. In the  
absence of logic transitions at the input for more than ~1 µs, a  
periodic set of refresh pulses indicative of the correct input state  
is sent to ensure dc correctness at the output. If the decoder receives  
no internal pulses for more than approximately 5 µs, the input side  
is assumed to be unpowered or nonfunctional, in which case the  
isolator output is forced to a default high state by the watchdog  
timer circuit.  
With proper PCB design choices, the ADuM7640/ADuM7641/  
ADuM7642/ADuM7643 can readily meet CISPR 22 Class A  
(and FCC Class A) emissions standards, as well as the more  
stringent CISPR 22 Class B (and FCC Class B) standards in  
an unshielded environment. For PCB-related EMI mitigation  
techniques, including board layout and stack-up issues, see the  
AN-1109 Application Note.  
Rev. 0 | Page 17 of 20  
 
 
 
 
 
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