ADuM6420A/ADuM6421A/ADuM6422A
Data Sheet
Parameter
Symbol Min
Typ
Max
Unit
Test Conditions/Comments
AC SPECIFICATIONS
Output Rise Time/Fall Time
tR/tF
2.5
ns
10% to 90%
Common-Mode Transient
Immunity4
|CMH|
75
75
100
kV/μs
VIx = VDD1 or VISO, common-mode
voltage (VCM) = 1000 V, transient
magnitude = 800 V
VIx = 0 V, VCM = 1000 V, transient
magnitude = 800 V
|CML|
100
kV/μs
1 IOX is the Channel x output current, where x is A, B, C, or D.
2 VIXH is the input side logic high.
3 VIXL is the input side logic low.
4 |CMH| is the maximum common-mode voltage slew rate that can be sustained while maintaining the voltage output (VO) > 0.8 VDDx. |CML| is the maximum common-mode voltage
slew rate that can be sustained while maintaining VO > 0.8 V. The common-mode voltage slew rates apply to both the rising and falling common-mode voltage edges.
ELECTRICAL CHARACTERISTICS—3.3 V OPERATION DIGITAL ISOLATOR CHANNELS ONLY
All typical specifications are at TA = 25°C, VDD1 = VDD2 = 3.3 V. Minimum and maximum specifications apply over the entire recommended
operation range: 3.0 V ≤ VDD1 ≤ 3.6 V, 3.0 V ≤ VDD2 ≤ 3.6 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching specifications
are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. Supply currents are specified with 50% duty cycle signals.
Table 8. Data Channel Supply Current Specifications
1 Mbps
10 Mbps
100 Mbps
Parameter
Symbol Min Typ Max Min Typ Max Min Typ Max Unit Test Conditions/Comments
SUPPLY CURRENT
CL = 0 pF
ADuM6420AXRNZ5 IDD1
4.8
1.4
4.8
1.4
4.0
2.1
4.0
2.1
3.1
3.0
3.1
3.0
8.5
2.5
8.5
2.5
8.3
4.4
8.3
4.4
6.0
6.0
6.0
6.0
4.9
2.1
4.9
2.1
4.3
2.7
4.3
2.7
3.6
3.7
3.6
3.7
9.0
3.4
9.0
3.4
8.4
5.6
8.4
5.6
6.2
6.2
6.0
6.2
7.0
7.5
7.0
7.5
7.1
8.0
7.1
8.0
7.4
8.5
7.4
8.5
11.0 mA
11 mA
IDD2
ADuM6420AXRNZ3 IDD1
11.0 mA
12.0 mA
11.6 mA
11.6 mA
11.6 mA
12.0 mA
11.0 mA
12.0 mA
11.0 mA
13.0 mA
IDD2
ADuM6421AXRNZ5 IDD1
IDD2
ADuM6421AXRNZ3 IDD1
IDD2
ADuM6422AXRNZ5 IDD1
IDD2
ADuM6422AXRNZ3 IDD1
IDD2
Table 9. Switching Specifications
Parameter
Symbol Min Typ Max Unit
Test Conditions/Comments
SWITCHING SPECIFICATIONS
Pulse Width
PW
10
ns
Within PWD limit
Data Rate
100
16
5.0
Mbps
ns
ns
ps/°C
ns
Within PWD limit
50% input to 50% output
|tPLH − tPHL|
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Propagation Delay Skew
tPHL, tPLH
PWD
7.0
10
1.0
1.5
tPSK
8.0
Between any two units at the same temperature, voltage, and
load
Channel Matching
Codirectional
Opposing Direction
Jitter
tPSKCD
tPSKOD
1.0
1.0
816
5.0
5.0
ns
ns
ps p-p
Rev. A | Page 6 of 26