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ADUM5240BRZ PDF预览

ADUM5240BRZ

更新时间: 2024-01-30 14:24:14
品牌 Logo 应用领域
亚德诺 - ADI 转换器
页数 文件大小 规格书
10页 142K
描述
Dual-Channel Isolators with Integrated DC/DC Converter, 50 mW

ADUM5240BRZ 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOIC-8针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.64
接口集成电路类型:INTERFACE CIRCUITJESD-30 代码:R-PDSO-G8
JESD-609代码:e3长度:4.9 mm
湿度敏感等级:1功能数量:1
端子数量:8最高工作温度:105 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:1.75 mm
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:3.9 mmBase Number Matches:1

ADUM5240BRZ 数据手册

 浏览型号ADUM5240BRZ的Datasheet PDF文件第4页浏览型号ADUM5240BRZ的Datasheet PDF文件第5页浏览型号ADUM5240BRZ的Datasheet PDF文件第6页浏览型号ADUM5240BRZ的Datasheet PDF文件第7页浏览型号ADUM5240BRZ的Datasheet PDF文件第8页浏览型号ADUM5240BRZ的Datasheet PDF文件第10页 
Preliminary Technical Data  
ADuM5240/ADuM5241/ADuM5242  
APPLICATION INFORMATION  
When these guidelines are followed, pre-production samples  
may be used for prototype and evaluation. As mentioned above  
this issue will be corrected in final silicon and the ADuM524x  
will operate at specified load and temperature conditions.  
DC/DC CONVERTER  
The ADuM524x can be operated with the internal DC/DC  
enabled or disabled. With the internal DC/DC converter  
enabled, the Pin 8 isolated supply provides output power as well  
as power to the parts isolated-side circuitry. Since the power  
consumed by the ADuM524x is a function of the input signals’  
data rate, the available isolated output power is determined by  
the data rate at which the parts data channels are operating.  
Table 14. Special Usage Conditions for Pre-production  
Devices  
Max Temperature by Load Capacitance1  
10nF  
105°C  
105°C  
80°C  
100nF  
The ADuM524xs internal DC/DC converter state is controlled  
by the input VDD voltage as defined in Table 6. In normal  
operating mode, VDD is set between 4.5 V and 5.5 V and the  
internal DC/DC converter is enabled. When/if it is desired to  
disable the DC/DC converter, VDD is lowered to a value between  
2.7 V and 4.0 V. In this mode, the VISO supply is supplied by the  
user and the ADuM524xs signal channels continue to operate  
normally.  
ADuM5240  
ADuM5241  
ADuM5242  
Not Recommended  
65°C  
80°C  
1 Value of load capacitor C3 in Figure 8  
PC BOARD LAYOUT  
The ADuM524x digital isolators require no external interface  
circuitry for the logic interfaces. Power supply bypassing is  
strongly recommended at the input and output supply pins as  
shown in Figure 8. For the ADuM5240 and ADuM5241, a  
bypass capacitance (C1) of 44 μF is required at the VDD input to  
ensure proper power-up. For all models bypass capacitance is  
recommended with C2=0.1 μF on the non-isolated side and  
C3=10 nF on the isolated side. Due to high inductance  
associated with larger capacitors such as C1, it is recommended  
that both C1 and C2 be used on the ADuM5240 and  
GUIDELINES FOR PRE-PRODUCTION SAMPLES  
Pre production samples meet all data sheet specifications;  
however, a limitation in the internal circuitry of the ADuM524x  
prevents proper start-up under all load conditions. This  
limitation will be corrected in the final product.  
At certain temperature and load conditions the ADuM524x will  
not regulate its VISO output to the 5.25V target voltage at  
converter start-up. The output stabilizes at just under 4V with  
no external load or as low as 3V with an external load. If the  
converter starts successfully, the output voltage will continue to  
regulate properly even as temperature and load conditions  
change.  
ADuM5241. The bypass capacitors should be placed as close as  
possible to the ADuM524x device.  
In cases where EMI is a concern, inductance should be added  
between the system supply and ground and the ADuM524x  
supply and ground as shown in Figure 8. Inductance can be  
added in the form of discrete inductors or ferrite beads, and its  
recommended the value correspond to an impedance between  
50Ω and 100Ω at approximately 300MHz.  
The start-up issue is affected by several circuit and  
environmental conditions: slew rate applied to VDD1, ambient  
temperature, and VISO capacitive load. The recommendations in  
the PC board layout section address the VDD1 slew rate  
dependence in most cases. Good results have been obtained  
when the system power supply slews at ~0.5V/μS. Faster slew  
rates can be tolerated but should be verified over temperature.  
Table 14 contains guidelines for the maximum reliable start-up  
temperature for two common values of load capacitance.  
The VISO start-up issue is strongly temperature dependant. The  
ADuM542x dissipates between 40 and 63mW under normal  
operation, causing the internal temperature of the device to be  
higher than ambient during normal operation. A “warm start”  
after the device has reached its equilibrium temperature is the  
worst case condition and will give the highest probability of  
incorrect regulation of output voltage. The guidelines in Table  
14 are based on “warm start” at full load. Cold start will be  
successful at higher ambient temperatures.  
Figure 8. Recommended Application Circuit. C1 may be  
omitted for ADuM5242, and L1 and L2 should be included  
where EMI is a concern.  
Rev. PrN | Page 9 of 10  

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