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ADUM4122BRIZ-RL PDF预览

ADUM4122BRIZ-RL

更新时间: 2024-01-10 12:05:54
品牌 Logo 应用领域
亚德诺 - ADI
页数 文件大小 规格书
18页 632K
描述
Single Gate, Adjustable Slew Rate, Isolated Gate Driver, 3 A Short-Circuit

ADUM4122BRIZ-RL 数据手册

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Single Gate, Adjustable Slew Rate, Isolated  
Gate Driver, 3 A Short-Circuit (<3 Ω)  
Data Sheet  
ADuM4122  
FEATURES  
GENERAL DESCRIPTION  
2 A output current per output pin (<3 Ω RDSON_X  
3 A peak short-circuit current  
3.3 V to 6.5 V, VDD1  
4.5 V to 35 V, VDD2  
Positive going threshold, UVLO at 3.3 V VDD1  
Multiple positive going thresholds, UVLO options on VDD2  
Grade A: 4.4 V (typical) positive going threshold, UVLO  
Grade B: 7.3 V (typical) positive going threshold, UVLO  
Grade C: 11.3 V (typical) positive going threshold, UVLO  
Precise timing characteristics  
48 ns maximum propagation delay for falling edge  
CMOS input logic levels  
High common-mode transient immunity: >150 kV/µs  
High junction temperature operation: 125°C  
Default low output  
)
The ADuM4122 is an isolated, single device, dual output driver  
that uses iCoupler® technology to provide precision isolation.  
The ADuM4122 provides 5 kV rms isolation in the wide-body,  
8-lead SOIC package. These isolation components combine  
high speed complementary metal-oxide semiconductor (CMOS)  
and monolithic transformer technology to provide performance  
characteristics superior to alternatives (such as a combination of  
pulse transformers and gate drivers).  
The ADuM4122 operates with an input supply voltage range  
from 3.3 V to 6.5 V, providing compatibility with lower voltage  
systems. Unlike gate drivers that employ high voltage level  
translation methodologies, the ADuM4122 offers true galvanic  
isolation between the input and the output regions.  
The ADuM4122 includes two output pins that facilitate slew  
rate control of two output drive strengths. The VOUT pin follows  
Selectable slew rate control  
the logic of the VIN+ pin, while the boosting output, VOUT_SRC  
can be toggled to follow the VIN+ pin or to go high-Z. The  
,
Safety and regulatory approvals (pending)  
UL recognition per UL 1577  
toggling of the slew rate is controlled by the primary side. Slew  
rate control can allow for electromagnetic interference (EMI)  
mitigation and voltage overshoot control.  
5 kV rms for 1 minute  
CSA Component Acceptance Notice 5A  
VDE certificate of conformity (pending)  
DIN V VDE V 0884-10  
An internal thermal shutdown sets outputs low if internal  
temperatures on the ADuM4122 exceed the thermal shutdown  
temperature.  
V
IORM = 849 V peak  
Wide-body, 8-lead SOIC_IC  
APPLICATIONS  
As a result, the ADuM4122 provides reliable control over the  
switching characteristics of insulated gate bipolar transistor (IGBT)  
and metal-oxide semiconductor field effect transistor (MOSFET)  
configurations over a wide range of switching voltages, allowing  
for simple slew rate control.  
Switching power supplies  
Isolated IGBT and MOSFET gate drivers  
Industrial inverters  
FUNCTIONAL BLOCK DIAGRAM  
UVLO TSD  
ADuM4122  
1
2
8
7
V
V
V
DD1  
DD2  
DECODE  
AND  
LOGIC  
ENCODE  
SRC  
OUT  
ENCODE  
3
4
V
V
6
5
OUT_SRC  
IN+  
GND  
GND  
2
UVLO  
1
Figure 1.  
1 Protected by U.S. Patents 5,952,849; 6,873,065; 7,075,239. Other patents pending.  
Rev. 0 Document Feedback  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rightsof third parties that may result fromits use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks andregisteredtrademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
©2019 Analog Devices, Inc. All rights reserved.  
Technical Support  
www.analog.com  
 
 
 
 

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