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ADUC7036DCPZ-RL

更新时间： 2024-01-26 03:35:59

品牌	Logo	应用领域
亚德诺 - ADI		模拟IC 电池传感器信号电路
页数	文件大小	规格书
132页	1341K
描述
Integrated Precision Battery Sensor for Automotive

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中文翻译

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技术参数
数据手册

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ADUC7036DCPZ-RL 技术参数

Source Url Status Check Date：	2013-05-01 14:56:49.529	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	QFN
包装说明：	HVQCCN, LCC48,.27SQ,20	针数：	48
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.58
Is Samacsys：	N	模拟集成电路 - 其他类型：	ANALOG CIRCUIT
JESD-30 代码：	S-XQCC-N48	长度：	7 mm
功能数量：	1	端子数量：	48
最高工作温度：	115 °C	最低工作温度：	-40 °C
封装主体材料：	UNSPECIFIED	封装代码：	HVQCCN
封装等效代码：	LCC48,.27SQ,20	封装形状：	SQUARE
封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	峰值回流温度（摄氏度）：	NOT SPECIFIED
电源：	3.5/18 V	认证状态：	Not Qualified
座面最大高度：	1 mm	子类别：	Power Management Circuits
最大供电电流 (Isup)：	30 mA	最大供电电压 (Vsup)：	18 V
最小供电电压 (Vsup)：	3.5 V	标称供电电压 (Vsup)：	7 V
表面贴装：	YES	温度等级：	INDUSTRIAL
端子形式：	NO LEAD	端子节距：	0.5 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	7 mm	Base Number Matches：	1

ADUC7036DCPZ-RL 数据手册

ADuC7036

Parameter

Test Conditions/Comments

Min

Typ

Max

Unit

PACKAGE THERMAL SPECIFICATIONS

Thermal Shutdown^{1, 31}

Thermal Impedance (θ_JA)³²

POWER REQUIREMENTS

Power Supply Voltages

VDD (Battery Supply)

140

150

160

°C

48-lead LFCSP, stacked die

°C/W

3.5

2.5

2.7

REG_DVDD, REG_AVDD³³

2.6

Power Consumption

I_DD(MCU Normal Mode)³⁴

MCU clock rate = 10.24 MHz, ADC off

MCU clock rate = 20.48 MHz, ADC off (valid for

ADuC7036CCPZ and ADuC7036DCPZ only)

ADC low power mode, measured over the range of

T_A= −10°C to +40°C, continuous ADC conversion

ADC low power mode, measured over the range of

T_A= −40°C to +85°C, continuous ADC conversion

I_DD(MCU Powered Down)¹

300

520

400

500

700

ꢀA

ADC low power plus mode, measured over the

range of T_A= −10°C to +40°C, continuous ADC

conversion

Average current, measured with wake-up and

watchdog timer clocked from the low power

oscillator, T_A= −40°C to +85°C

Average current, measured with wake-up and

watchdog timer clocked from low power oscillator

over a range of T_A= −10°C to +40°C

120

300

175

ꢀA

I_DD(MCU Powered Down)

I_DD(Current ADC)

I_DD(Voltage/Temperature ADC)

I_DD(Precision Oscillator)

1.7

0.5

400

ꢀA

¹These numbers are not production tested but are guaranteed by design and/or characterization data at production release.

²Valid for current ADC gain setting of PGA = 4 to 64.

³These numbers include temperature drift.

⁴Tested at gain range = 4; self-offset calibration removes this error.

⁵Measured with an internal short after an initial offset calibration.

⁶Measured with an internal short.

⁷These numbers include internal reference temperature drift.

⁸Factory-calibrated at gain = 1.

⁹System calibration at a specific gain range (and temperature) removes the error at this gain range (and temperature).

¹⁰Includes an initial system calibration.

¹¹Using ADC normal mode voltage reference.

¹²Typical noise in low power modes is measured with chop enabled.

¹³Voltage channel specifications include resistive attenuator input stage.

¹⁴System calibration removes this error at the specified temperature.

¹⁵RMS noise is referred to voltage attenuator input (for example, at f_ADC= 1 kHz, typical rms noise at the ADC input is 7.5 μV) and scaled by the attenuator (divide-by-24)

to yield these input referred noise specifications/values.

¹⁶Valid after an initial self-calibration.

¹⁷In ADC low power mode, the input range is fixed at 9.375 mV. In ADC low power plus mode, the input range is fixed at 2.34375 mV.

¹⁸It is possible to extend the ADC input range by up to 10% by modifying the factory set value of the gain calibration register or using system calibration. This approach

can also be used to reduce the ADC input range (LSB size).

¹⁹Limited by minimum/maximum absolute input voltage range.

²⁰Valid for a differential input less than 10 mV.

²¹Measured using box method.

²²The long-term stability specification is noncumulative. The drift in subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.

²³References of up to REG_AVDD can be accommodated by enabling an internal divide-by-2.

²⁴Die temperature.

²⁵Endurance is qualified to 10,000 cycles as per JEDEC Std. 22 Method A117 and measured at −40°C, +25°C, and +125°C. Typical endurance at 25°C is 170,000 cycles.

²⁶Retention lifetime equivalent at junction temperature (T_J) of 85°C as per JEDEC Std. 22 Method A117. Retention lifetime derates with junction temperature.

²⁷Low power oscillator can be calibrated against either the precision oscillator or the external 32.768 kHz crystal in user code.

²⁸These numbers are not production tested, but are supported by LIN compliance testing.

²⁹BSD electrical specifications, except high and low voltage levels, are per LIN 2.0 with pull-up resistor disabled and C_L= 10 nF maximum.

³⁰Specified after R_LIMITof 39 Ω.

³¹The MCU core is not shut down but interrupted, and high voltage I/O pins are disabled in response to a thermal shutdown event.

³²Thermal impedance can be used to calculate the thermal gradient from ambient to die temperature.

³³Internal regulated supply available at REG_DVDD (I_SOURCE= 5 mA), and REG_AVDD (I_SOURCE= 1 mA).

³⁴The specification listed is typical; additional supply current consumed during Flash/EE memory program and erase cycles is 7 mA and 5 mA, respectively.

Rev. C | Page 9 of 132

1...6 7 8910 11 12...132

中文翻译

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