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ADT7490ARQZ PDF预览

ADT7490ARQZ

更新时间: 2024-01-07 14:15:11
品牌 Logo 应用领域
亚德诺 - ADI 模拟IC风扇信号电路光电二极管监控控制器
页数 文件大小 规格书
76页 1623K
描述
dBCool Remote Thermal Monitor and Fan Controller with PECI Interface

ADT7490ARQZ 技术参数

是否Rohs认证:符合生命周期:Transferred
零件包装代码:SSOP包装说明:SSOP, SSOP24,.24
针数:24Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.04Is Samacsys:N
模拟集成电路 - 其他类型:ANALOG CIRCUITJESD-30 代码:R-PDSO-G24
JESD-609代码:e3长度:8.6614 mm
功能数量:1端子数量:24
最高工作温度:125 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP24,.24封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3 V认证状态:Not Qualified
座面最大高度:1.7526 mm子类别:Motion Control Electronics
最大供电电流 (Isup):5 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES温度等级:AUTOMOTIVE
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.9116 mmBase Number Matches:1

ADT7490ARQZ 数据手册

 浏览型号ADT7490ARQZ的Datasheet PDF文件第70页浏览型号ADT7490ARQZ的Datasheet PDF文件第71页浏览型号ADT7490ARQZ的Datasheet PDF文件第72页浏览型号ADT7490ARQZ的Datasheet PDF文件第73页浏览型号ADT7490ARQZ的Datasheet PDF文件第75页浏览型号ADT7490ARQZ的Datasheet PDF文件第76页 
ADT7490  
Table 88. Register 0x8F—Dynamic TMIN Control Register 2 (Power-On Default = 0x00)  
Bit No. Mnemonic R/W1  
Description  
[2:0]  
[5:3]  
[7:6]  
CYR1  
R/W  
R/W  
R/W  
3-Bit Remote 1 Cycle Value. These three bits define the delay time between making subsequent TMIN  
adjustments in the control loop for the Remote 1 channel in terms of number of monitoring cycles.  
The system has associated thermal time constants that need to be found to optimize the response of  
fans and the control loop.  
Bit Code  
000  
Decrease Cycle  
8 cycles (1 sec)  
Increase Cycle  
16 cycles (2 sec)  
001  
010  
011  
100  
101  
110  
111  
16 cycles (2 sec)  
32 cycles (4 sec)  
64 cycles (8 sec)  
128 cycles (16 sec)  
256 cycles (32 sec)  
512 cycles (64 sec)  
1024 cycles (128 sec)  
32 cycles (4 sec)  
64 cycles (8 sec)  
128 cycles (16 sec)  
256 cycles (32 sec)  
512 cycles (64 sec)  
1024 cycles (128 sec)  
2048 cycles (256 sec)  
CYL  
3-Bit Local Temperature Cycle Value. These three bits define the delay time between making  
subsequent TMIN adjustments in the control loop for the local temperature channel in terms of  
number of monitoring cycles. The system has associated thermal time constants that need to be  
found to optimize the response of fans and the control loop.  
Bit Code  
000  
Decrease Cycle  
8 cycles (1 sec)  
Increase Cycle  
16 cycles (2 sec)  
001  
010  
011  
100  
101  
110  
111  
16 cycles (2 sec)  
32 cycles (4 sec)  
64 cycles (8 sec)  
128 cycles (16 sec)  
256 cycles (32 sec)  
512 cycles (64 sec)  
1024 cycles (128 sec)  
32 cycles (4 sec)  
64 cycles (8 sec)  
128 cycles (16 sec)  
256 cycles (32 sec)  
512 cycles (64 sec)  
1024 cycles (128 sec)  
2048 cycles (256 sec)  
CYR2  
2 LSBs of 3-Bit Remote 2 Cycle Value. The MSB of the 3-bit code resides in the Dynamic TMIN Control  
Register 1 (Register 0x8E). These three bits define the delay time between making subsequent TMIN  
adjustments in the control loop for the Remote 2 channel in terms of number of monitoring cycles.  
The system has associated thermal time constants that need to be found to optimize the response of  
fans and the control loop.  
Bit Code  
000  
Decrease Cycle  
8 cycles (1 sec)  
Increase Cycle  
16 cycles (2 sec)  
001  
010  
011  
100  
101  
110  
111  
16 cycles (2 sec)  
32 cycles (4 sec)  
64 cycles (8 sec)  
128 cycles (16 sec)  
256 cycles (32 sec)  
512 cycles (64 sec)  
1024 cycles (128 sec)  
32 cycles (4 sec)  
64 cycles (8 sec)  
128 cycles (16 sec)  
256 cycles (32 sec)  
512 cycles (64 sec)  
1024 cycles (128 sec)  
2048 cycles (256 sec)  
1 This register becomes read-only when the Configuration Register 1 (0x40) LOCK bit is set to 1. Any subsequent attempts to write to this register fail.  
Rev. 0 | Page 74 of 76  

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