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ADT7463ARQZ-R7 PDF预览

ADT7463ARQZ-R7

更新时间: 2024-01-29 20:32:21
品牌 Logo 应用领域
安森美 - ONSEMI 运动控制电子器件信号电路监视器控制器
页数 文件大小 规格书
52页 1014K
描述
dB COOL™ Remote Thermal Controller and Voltage Monitor

ADT7463ARQZ-R7 技术参数

是否Rohs认证: 符合生命周期:Active
Reach Compliance Code:unknown风险等级:5.72
Base Number Matches:1

ADT7463ARQZ-R7 数据手册

 浏览型号ADT7463ARQZ-R7的Datasheet PDF文件第45页浏览型号ADT7463ARQZ-R7的Datasheet PDF文件第46页浏览型号ADT7463ARQZ-R7的Datasheet PDF文件第47页浏览型号ADT7463ARQZ-R7的Datasheet PDF文件第49页浏览型号ADT7463ARQZ-R7的Datasheet PDF文件第50页浏览型号ADT7463ARQZ-R7的Datasheet PDF文件第51页 
ADT7463  
Table XXXII. Register 0x74 – Interrupt Mask Register 1 (Power-On Default <7:0> = 0x00)  
Bit  
Name  
R/W  
Description  
0
1
2
3
4
2.5V  
VCCP  
VCC  
5V  
Read/Write  
Read/Write  
Read/Write  
Read/Write  
Read/Write  
A one masks SMBALERT for out-of-limit conditions on the 2.5 V channel.  
A one masks SMBALERT for out-of-limit conditions on the VCCP channel.  
A one masks SMBALERT for out-of-limit conditions on the VCC channel.  
A one masks SMBALERT for out-of-limit conditions on the 5 V channel.  
A one masks SMBALERT for out-of-limit conditions on the Remote 1  
Temperature channel.  
R1T  
5
6
7
LT  
Read/Write  
Read/Write  
Read/Write  
A one masks SMBALERT for out-of-limit conditions on the Local  
Temperature channel.  
A one masks SMBALERT for out-of-limit conditions on the Remote 2  
Temperature channel.  
R2T  
OOL  
A one masks SMBALERT for any out-of-limit condition in Status Register 2.  
Table XXXIII. Register 0x75 – Interrupt Mask Register 2 (Power-On Default <7:0> = 0x00)  
Bit  
Name  
R/W  
Description  
0
1
2
3
4
5
12V/VC  
OVT  
FAN1  
FAN2  
FAN3  
F4P  
Read/Write  
Read Only  
Read/Write  
Read/Write  
Read/Write  
Read/Write  
A one masks SMBALERT for out-of-limit conditions on the 12 V channel.  
A one masks SMBALERT for overtemperature THERM conditions.  
A one masks SMBALERT for a Fan 1 Fault.  
A one masks SMBALERT for a Fan 2 Fault.  
A one masks SMBALERT for a Fan 3 Fault.  
A one masks SMBALERT for a Fan 4 Fault. If the TACH4 pin is being used as the  
THERM input, this bit masks SMBALERT for a THERM timer event.  
A one masks SMBALERT for a diode open or short on Remote 1 channel.  
A one masks SMBALERT for a diode open or short on Remote 2 channel.  
6
7
D1  
D2  
Read/Write  
Read/Write  
Table XXXIV. Register 0x76 – Extended Resolution Register 1  
Description  
Bit  
Name  
R/W  
<1:0>  
<3:2>  
<5:4>  
<7:6>  
2.5V  
VCCP  
VCC  
5V  
Read-Only  
Read-Only  
Read-Only  
Read-Only  
2.5 V LSBs. Holds the 2 LSBs of the 10-bit 2.5 V measurement.  
VCCP LSBs. Holds the 2 LSBs of the 10-bit VCCP measurement.  
VCC LSBs. Holds the 2 LSBs of the 10-bit VCC measurement.  
5 V LSBs. Holds the 2 LSBs of the 10-bit 5 V measurement.  
If this register is read, this register and the registers holding the MSB of each reading are frozen until read.  
Table XXXV. Register 0x77 – Extended Resolution Register 2  
Bit  
Name  
R/W  
Description  
<1:0>  
<3:2>  
12V  
TDM1  
Read-Only  
Read-Only  
12 V LSBs. Holds the 2 LSBs of the 10-bit 12 V measurement.  
Remote 1 Temperature LSBs. Holds the 2 LSBs of the 10-bit Remote 1  
Temperature measurement.  
<5:4>  
<7:6>  
LTMP  
TDM2  
Read-Only  
Read-Only  
Local Temperature LSBs. Holds the 2 LSBs of the 10-bit Local  
Temperature measurement.  
Remote 2 Temperature LSBs. Holds the 2 LSBs of the 10-bit Remote 2  
Temperature measurement.  
If this register is read, this register and the registers holding the MSB of each reading are frozen until read.  
Rev. 4 | Page 48 of 52 | www.onsemi.com  

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