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ADT7463ARQZ-R7

更新时间： 2024-01-18 21:23:16

品牌	Logo	应用领域
安森美 - ONSEMI		运动控制电子器件信号电路监视器控制器
页数	文件大小	规格书
52页	1014K
描述
dB COOL™ Remote Thermal Controller and Voltage Monitor

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技术参数
数据手册

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ADT7463ARQZ-R7 技术参数

是否Rohs认证：	符合	生命周期：	Active
Reach Compliance Code：	unknown	风险等级：	5.72
Base Number Matches：	1

ADT7463ARQZ-R7 数据手册

ADT7463

Table XXVII. XOR Tree Test Enable

Description

XOR Tree Test Enable Register

R/W*

Power-On Default

0x6F

<0>

Read/Write

XEN

0x00

If the XEN bit is set to 1, the device enters the XOR Tree Test Mode. Clearing the bit

removes the device from the XOR Test Mode.

<7:1>

Reserved

Unused. Do not write to these bits.

*This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any further attempts to write to this register will have no effect.

Table XXVIII. Remote 1 Temperature Offset

0x70

R/W*

Description

Power-On Default

Read/Write

Remote 1 Temperature Offset

0x00

<7:0>

Allows a twos complement offset value to be automatically added to or subtracted from

the Remote 1 Temperature reading. This is to compensate for any inherent system offsets

such as PCB trace resistance. LSB value = 0.25°C.

*This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any further attempts to write to this register will have no effect.

Table XXIX. Local Temperature Offset

0x71

R/W*

Description

Power-On Default

Read/Write

Local Temperature Offset

0x00

<7:0>

Allows a twos complement offset value to be automatically added to or subtracted from

the local temperature reading. LSB value = 0.25°C.

*This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any further attempts to write to this register will have no effect.

Table XXX. Remote 2 Temperature Offset

0x72

R/W*

Description

Power-On Default

Read/Write

Remote 2 Temperature Offset

0x00

<7:0>

Allows a twos complement offset value to be automatically added to or subtracted from

the Remote 2 Temperature reading. This is to compensate for any inherent system off-

sets such as PCB trace resistance. LSB value = 0.25°C.

*This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any further attempts to write to this register will have no effect.

Rev. 4 | Page 46 of 52 | www.onsemi.com

–46–

REV. C

1...43 44 454647 48 49...52

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