PueliminruyCTeAhniArlCDrarC
DT730±
CS
t1
t7
t2
15
SCLK
DOUT
1
2
3
4
16
t3
t8
t4
DB0
DB1
LEADING ZEROS
DB13
DB12
t
6
t
5
POWER-
DOWN
DIN
Figure 13. Serial Interface Timing Diagram
SERIAL INTERFACE
Read Operation
Figure 13 shows the timing diagram for a serial read from the
CS
data plus a sign bit are transferred during a read operation.
Read operations occur during streams of 16 clock pulses. The
first two bits out are leading zeros and the next 14 bits contain
CS
The serial interface on the ADT7302 consists of four wires:
SCLK, DIN, and DOUT. The interface can be operated in 2-
CS
,
ADT7302. The
line enables the SCLK input. Thirteen bits of
wire mode with
inter-face has read-only capability, with data being read from
CS
and DIN tied to ground, in which case the
the data register via the DOUT line. It is advisable to utilize
,
which improves synchronization between the ADT7302 and the
master device. The DIN line is used to write the part into
standby mode, if required. The
device when more than one device is connected to the serial
clock and data lines.
CS
the temperature data. If
remains low and 16 more SCLK
cycles are applied, the ADT7302 loops around and outputs the
two leading zeros plus the 14 bits of data that are in the temper-
CS
line is used to select the
CS
ature value register. When
returns high, the DOUT line goes
into three-state. Data is clocked out onto the DOUT line on the
falling edge of SCLK.
The part operates in a slave mode and requires an externally
applied serial clock to the SCLK input to access data from the
data register. The serial interface on the ADT7302 allows the
part to be interfaced to systems that provide a serial clock
synchronized to the serial data, such as the 80C51, 87C51,
68HC11, 68HC05 and PIC16Cxx microcontrollers as well as
DSP processors.
Write Operation
Figure 13 also shows the timing diagram for a serial write to the
ADT7302. The write operation takes place at the same time as
the read operation. Only the third bit in the data stream
provides a user-controlled function. This third bit is the power-
down bit, which, when set to a 1, puts the ADT7302 into
shutdown mode. Besides the power-down bit, all bits in the
input data stream should be zero to ensure correct operation of
the ADT7302. Data is loaded into the control register on the
16th rising SCLK edge; the data takes effect at this time, i.e., if
A read operation from the ADT7302 accesses data from the
temperature value register while a write operation to the part
writes data to the control register.
the part is programmed to go into shutdown, it does so at this
th
CS
point. If
is brought high before this 16 SCLK edge, the
control register is not loaded and the power-down status of the
part does not change. Data is clocked into the ADT7302 on the
rising edge of SCLK.
Rev. PrE | Page 9 of 14