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DT73ꢀ±
FEATURES
GENERAL DESCRIPTION
13- or 16-bit user selectable temperature-to-digital converter
Temperature accuracy 0.ꢀ°C from −40°C to +10ꢀ°C
No temperature calibration/correction required by user
Power saving 1 sample per second (SPS) mode
Fast first conversion on power-up of 6 ms
SPI-compatible interface
Operating temperature from −ꢀꢀ°C to +1ꢀ0°C
Operating voltage: 2.7 V to ꢀ.ꢀ V
The ADT7310 is a high accuracy digital temperature sensor
in a narrow SOIC package. It contains a band gap temperature
reference and a 13-bit ADC to monitor and digitize the
temperature to a 0.0625°C resolution. The ADC resolution,
by default, is set to 13 bits (0.0625 °C). This can be changed
to 16 bits (0.0078 °C) by setting Bit 7 in the configuration
register (Register Address 0x01).
The ADT7310 is guaranteed to operate over supply voltages from
2.7 V to 5.5 V. Operating at 3.3 V, the average supply current is
typically 210 μA. The ADT7310 has a shutdown mode that
powers down the device and offers a shutdown current of
typically 2 μA. The ADT7310 is rated for operation over the
−55°C to +150°C temperature range.
Critical overtemperature indicator
Programmable overtemperature/undertemperature interrupt
Low power consumption: 700 μW typical at 3.3 V
Shutdown mode for lower power: 7μW typical at 3.3 V
8-lead narrow SOIC RoHS-compliant package
APPLICATIONS
The CT pin is an open-drain output that becomes active when
the temperature exceeds a programmable critical temperature
limit. The default critical temperature limit is 147°C. The INT
pin is also an open-drain output that becomes active when the
temperature exceeds a programmable limit. The INT and CT
pins can operate in either comparator or interrupt mode.
Medical equipment
Environmental control systems
Computer thermal monitoring
Thermal protection
Industrial process control
Power system monitors
Hand-held applications
FUNCTIONAL BLOCK DIAGRAM
1
2
3
4
SCLK
DOUT
ADT7310
INTERNAL
OSCILLATOR
INTERNAL
REFERENCE
DIN
CS
6
5
CT
T
T
T
CRIT
HIGH
LOW
Σ-Δ
MODULATOR
TEMPERATURE
SENSOR
TEMPERATURE
VALUE
CONFIGURATION
AND STATUS
REGISTERS
INT
REGISTER
T
T
HYST
REGISTER
CRIT
REGISTER
FILTER
LOGIC
7
8
GND
T
T
HIGH
REGISTER
LOW
REGISTER
V
DD
Figure 1.
Rev. 0
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