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ADT250HVIS45 PDF预览

ADT250HVIS45

更新时间: 2024-11-24 01:17:31
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POSEICO /
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4页 165K
描述
PHASE CONTROL MODULE

ADT250HVIS45 数据手册

 浏览型号ADT250HVIS45的Datasheet PDF文件第2页浏览型号ADT250HVIS45的Datasheet PDF文件第3页浏览型号ADT250HVIS45的Datasheet PDF文件第4页 
POSEICO SPA  
Via Pillea 42-44, 16153 Genova - ITALY  
Tel. + 39 010 8599400 - Fax + 39 010 8682006  
Sales Office:  
Tel. + 39 010 8599400 - sales@poseico.com  
PHASE CONTROL MODULE  
ADT250HVI  
Repetitive voltage up to  
Mean forward current  
Surge current  
4500 V  
259 A  
5,9 kA  
FINAL SPECIFICATION  
apr 17 - ISSUE : 02  
Tj  
[°C]  
Symbol  
Characteristic  
Conditions  
Value  
Unit  
BLOCKING  
V RRM  
Repetitive peak reverse/off-state voltage  
Non-repetitive peak reverse voltage  
Repetitive peak reverse/off-state current  
125  
125  
125  
4500  
4600  
75  
V
V
V RSM  
I
I
RRM/DRM  
mA  
CONDUCTING  
T (AV)  
Mean forward current  
180° sin, 50 Hz, Th=85°C, double side cooled  
180° sin, 50 Hz, Tc=55°C, double side cooled  
259  
A
I
I
T (AV)  
TSM  
Mean forward current  
Surge forward current  
I² t  
383  
5,9  
A
kA  
Sine wave, 10 ms  
without reverse voltage  
125  
x 103  
I² t  
174  
3,34  
A²s  
V
V T  
On-state voltage  
Threshold voltage  
On-state slope resistance  
On-state current =  
1600 A  
25  
V T(TO)  
125  
125  
1,35  
V
r
T
1,335  
mohm  
SWITCHING  
From 75% VDRM up to 1050 A; gate 10V, 5W  
di/dt  
Critical rate of rise of on-state current, min.  
125  
200  
A/µs  
dv/dt  
Critical rate of rise of off-state voltage, min.  
Gate controlled delay time, typical  
Circuit commutated turn-off time, typical  
Reverse recovery charge  
Linear ramp up to 70% of VDRM  
125  
25  
500  
1,6  
V/µs  
µs  
VD=100V; gate source 25V, 10W , tr=.5 µs  
t
t
d
q
dv/dt = 20 V/µs linear up to 75% VDRM  
di/dt = -20 A/µs, I= 700 A  
VR= 50 V  
320  
µs  
Q rr  
125  
µC  
A
I
I
I
rr  
Peak reverse recovery current  
Holding current, typical  
H
VD=5V, gate open circuit  
VD=5V, tp=30µs  
25  
25  
300  
700  
mA  
mA  
L
Latching current, typical  
GATE  
V GT  
Gate trigger voltage  
VD=5V  
25  
3,50  
V
I
GT  
Gate trigger current  
VD=5V  
25  
200  
0,25  
30  
mA  
V
V GD  
Non-trigger gate voltage, min.  
Peak gate voltage (forward)  
Peak gate current  
VD=VDRM  
125  
V FGM  
V
I
FGM  
10  
A
V RGM  
P GM  
P G  
Peak gate voltage (reverse)  
Peak gate power dissipation  
Average gate power dissipation  
5
V
Pulse width 100 µs  
150  
2
W
W
MOUNTING  
R th(j-h)  
Thermal impedance, DC  
Junction to case, per element  
Case to heatsink, per element  
70,0  
°C/kW  
R th(c-h)  
T j  
Thermal impedance  
Operating junction temperature  
RMS insulation voltage  
Mounting torque  
20,0  
-30 / 125  
6000  
°C/kW  
°C  
V ins  
T
50 hz , circuit to base, all terminal shorted  
Case to heatsink  
25  
V
4 to 6  
kN  
kN  
g
T
Mounting torque  
Busbars to terminal  
12 to 18  
1500  
Mass  
ORDERING INFORMATION : ADT250HVI S 45  
VRRM/100  
standard specification  

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