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ADSP-21364KSQZ-1AA PDF预览

ADSP-21364KSQZ-1AA

更新时间: 2024-02-26 00:24:37
品牌 Logo 应用领域
罗彻斯特 - ROCHESTER /
页数 文件大小 规格书
57页 3019K
描述
16-BIT, 55.55 MHz, OTHER DSP, PQFP144, LEAD FREE, MS-026BFB-HD, LQFP-144

ADSP-21364KSQZ-1AA 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFP
包装说明:HLFQFP,针数:144
Reach Compliance Code:unknown风险等级:5.71
其他特性:ALSO REQUIRES 3.3V SUPPLY地址总线宽度:16
桶式移位器:YES边界扫描:YES
最大时钟频率:55.55 MHz外部数据总线宽度:16
格式:FLOATING POINT内部总线架构:MULTIPLE
JESD-30 代码:S-PQFP-G144JESD-609代码:e3
长度:20 mm低功率模式:NO
湿度敏感等级:NOT APPLICABLE端子数量:144
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:HLFQFP
封装形状:SQUARE封装形式:FLATPACK, HEAT SINK/SLUG, LOW PROFILE, FINE PITCH
峰值回流温度(摄氏度):260认证状态:COMMERCIAL
座面最大高度:1.6 mm最大供电电压:1.26 V
最小供电电压:1.14 V标称供电电压:1.2 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:MATTE TIN
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:40
宽度:20 mmuPs/uCs/外围集成电路类型:DIGITAL SIGNAL PROCESSOR, OTHER
Base Number Matches:1

ADSP-21364KSQZ-1AA 数据手册

 浏览型号ADSP-21364KSQZ-1AA的Datasheet PDF文件第4页浏览型号ADSP-21364KSQZ-1AA的Datasheet PDF文件第5页浏览型号ADSP-21364KSQZ-1AA的Datasheet PDF文件第6页浏览型号ADSP-21364KSQZ-1AA的Datasheet PDF文件第8页浏览型号ADSP-21364KSQZ-1AA的Datasheet PDF文件第9页浏览型号ADSP-21364KSQZ-1AA的Datasheet PDF文件第10页 
ADSP-21364  
signal processing, and are commonly used in digital filters and  
Fourier transforms. The two DAGs of the ADSP-21364 contain  
sufficient registers to allow the creation of up to 32 circular buff-  
ers (16 primary register sets, 16 secondary). The DAGs  
automatically handle address pointer wraparound, reduce over-  
head, increase performance, and simplify implementation.  
Circular buffers can start and end at any memory location.  
On-Chip Memory  
The ADSP-21364 contains three megabits of internal SRAM.  
Each block can be configured for different combinations of code  
and data storage (see Table 2 on Page 6). Each memory block  
supports single-cycle, independent accesses by the core proces-  
sor and I/O processor. The ADSP-21364 memory architecture,  
in combination with its separate on-chip buses, allow two data  
transfers from the core and one from the I/O processor, in a sin-  
gle cycle.  
Flexible Instruction Set  
The 48-bit instruction word accommodates a variety of parallel  
operations, for concise programming. For example, the  
ADSP-21364 can conditionally execute a multiply, an add, and a  
subtract in both processing elements while branching and fetch-  
ing up to four 32-bit values from memory—all in a single  
instruction.  
The ADSP-21364’s SRAM can be configured as a maximum of  
96K words of 32-bit data, 192K words of 16-bit data, 64K words  
of 48-bit instructions (or 40-bit data), or combinations of differ-  
ent word sizes up to three megabits. All of the memory can be  
accessed as 16-bit, 32-bit, 48-bit, or 64-bit words. A 16-bit float-  
ing-point storage format is supported that effectively doubles  
the amount of data that may be stored on-chip. Conversion  
between the 32-bit floating-point and 16-bit floating-point for-  
mats is performed in a single instruction. While each memory  
block can store combinations of code and data, accesses are  
most efficient when one block stores data using the DM bus for  
transfers, and the other block stores instructions and data using  
the PM bus for transfers.  
ADSP-21364 MEMORY AND I/O INTERFACE  
FEATURES  
The ADSP-21364 adds the following architectural features to  
the SIMD SHARC family core.  
Table 2. ADSP-21364 Internal Memory Space  
IOP Registers 0x0000 0000–0003 FFFF  
ExtendedPrecisionNormalor  
Long Word (64 Bits)  
Instruction Word (48 Bits)  
Normal Word (32 Bits)  
Short Word (16 Bits)  
BLOCK 0 ROM  
BLOCK 0 ROM  
BLOCK 0 ROM  
BLOCK 0 ROM  
0x0004 0000–0x0004 7FFF  
0x0008 0000–0x0008 AAA9  
0x0008 0000–0x0008 FFFF  
0x0010 0000–0x0011 FFFF  
Reserved  
Reserved  
Reserved  
0x0004 8000–0x0004 BFFF  
0x0009 0000–0x0009 7FFF  
0x0012 0000–0x0012 FFFF  
BLOCK 0 RAM  
BLOCK 0 RAM  
BLOCK 0 RAM  
BLOCK 0 RAM  
0x0004 C000–0x0004 FFFF  
0x0009 0000–0x0009 5554  
0x0009 8000–0x0009 FFFF  
0x0013 0000–0x0013 FFFF  
BLOCK 1 ROM  
BLOCK 1 ROM  
BLOCK 1 ROM  
BLOCK 1 ROM  
0x0005 0000–0x0005 7FFF  
0x000A 0000–0x000A AAA9  
0x000A 0000–0x000A FFFF  
0x0014 0000–0x0015 FFFF  
Reserved  
Reserved  
Reserved  
0x0005 8000–0x0005 BFFF  
0x000B 0000–0x000B 7FFF  
0x0016 0000–0x0016 FFFF  
BLOCK 1 RAM  
BLOCK 1 RAM  
BLOCK 1 RAM  
BLOCK 1 RAM  
0x0005 C000–0x0005 FFFF  
0x000B 0000–0x000B 5554  
0x000B 8000–0x000B FFFF  
0x0017 0000–0x0017 FFFF  
BLOCK 2 RAM  
BLOCK 2 RAM  
BLOCK 2 RAM  
BLOCK 2 RAM  
0x0006 0000–0x0006 1FFF  
0x000C 0000–0x000C 2AA9  
0x000C 0000–0x000C 3FFF  
0x0018 0000–0x0018 7FFF  
Reserved  
Reserved  
Reserved  
0x0006 2000–0x0006 FFFF  
0x000C 4000–0x000D FFFF  
0x0018 8000–0x001B FFFF  
BLOCK 3 RAM  
BLOCK 3 RAM  
BLOCK 3 RAM  
BLOCK 3 RAM  
0x0007 0000–0x0007 1FFF  
0x000E 0000–0x000E 2AA9  
0x000E 0000–0x000E 3FFF  
0x001C 0000–0x001C 7FFF  
Reserved  
Reserved  
Reserved  
0x0007 2000–0x0007 FFFF  
0x000E 4000–0x000F FFFF  
0x001C 8000–0x001F FFFF  
Reserved  
0x0020 0000–0xFFFF FFFF  
Rev. 0  
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Page 6 of 56  
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October 2005  

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