ADS61B23IRHBT

更新时间： 2024-02-01 09:14:09

品牌	Logo	应用领域
德州仪器 - TI		转换器模数转换器输入元件
页数	文件大小	规格书
51页	1324K
描述
12-BIT, 80-MSPS ADC WITH BUFFERED ANALOG INPUTS

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技术参数
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ADS61B23IRHBT 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	QFN
包装说明：	HVQCCN, LCC32,.2SQ,20	针数：	32
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	1.27
Is Samacsys：	N	最大模拟输入电压：	2 V
最小模拟输入电压：		转换器类型：	ADC, PROPRIETARY METHOD
JESD-30 代码：	S-PQCC-N32	JESD-609代码：	e4
长度：	5 mm	最大线性误差 (EL)：	0.0732%
湿度敏感等级：	3	模拟输入通道数量：	1
位数：	12	功能数量：	1
端子数量：	32	最高工作温度：	85 °C
最低工作温度：	-40 °C	输出位码：	OFFSET BINARY, 2'S COMPLEMENT BINARY
输出格式：	SERIAL, PARALLEL, WORD	封装主体材料：	PLASTIC/EPOXY
封装代码：	HVQCCN	封装等效代码：	LCC32,.2SQ,20
封装形状：	SQUARE	封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：	260	电源：	1.8/3.3,3.3 V
认证状态：	Not Qualified	采样速率：	80 MHz
采样并保持/跟踪并保持：	SAMPLE	座面最大高度：	1 mm
子类别：	Analog to Digital Converters	标称供电电压：	3.3 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：	NO LEAD	端子节距：	0.5 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	5 mm	Base Number Matches：	1

ADS61B23IRHBT 数据手册

ADS61B23

www.ti.com

SLAS582–FEBRUARY 2008

12-BIT, 80-MSPS ADC WITH BUFFERED ANALOG INPUTS

FEATURES

DESCRIPTION

•

Maximum Sample Rate: 80 MSPS

12-bit Resolution with No Missing Codes

Buffered Analog Inputs with

•

ADS61B23 is a 12-bit A/D converter (ADC) with a

maximum sampling frequency of 80 MSPS. It

combines high performance and low power

consumption in a compact 32-QFN package. The

analog inputs use buffers to isolate the switching

transients of the internal sample & hold from the

external driving circuit. The buffered inputs present

very low input capacitance (< 2pF) & wide bandwidth.

This makes it easy to drive them at high input

frequencies, compared to an ADC without the input

buffers.

–

Very Low Input Capacitance (< 2 pF)

High DC Resistance (5 kΩ)

•

82 dBc SFDR and 70 dBFS SNR

(-1 dBFS or 1.8 Vpp input)

•

85 dBc SFDR (-6 dBFS or 1 Vpp input)

3.5 dB Coarse Gain and up to 6 dB

Programmable Fine Gain for SNR and SFDR

Trade-Off

ADS61B23 has coarse and fine gain options that are

used to improve SFDR performance at lower

full-scale analog input ranges.

•

Parallel CMOS and Double Data Rate (DDR)

LVDS Output Options

Supports Sine, LVCMOS, LVPECL, LVDS Clock

Inputs and Clock Amplitude Down to 400 mV_PP

The digital data outputs are parallel CMOS or DDR

LVDS (Double Data Rate). Several features exist to

ease data capture—controls for output clock position

and output buffer drive strength, plus LVDS current

and internal termination programmability.

•

Clock Duty Cycle Stabilizer

Internal Reference with Support for External

Reference

The output interface type, gain, and other functions

are programmed using a 3-wire serial interface.

Alternatively, some of these functions are configured

using dedicated parallel pins so the device starts in

the desired state after power-up.

•

External Decoupling Eliminated for References

Programmable Output Clock Position and

Drive Strength to Ease Data Capture

•

3.3 V Analog and 1.8 V to 3.3 V Digital Supply

32-pin QFN Package (5 mm × 5 mm)

Pin Compatible 12-Bit Family (ADS612X)

Temperature range –40°C to 85°C

ADS61B23 includes internal references, while

eliminating the traditional reference pins and

associated external decoupling. External reference

mode is also supported.

APPLICATIONS

•

Wireless Communications Infrastructure

Software Defined Radio

Power Amplifier Linearization

802.16d/e

Test and Measurement Instrumentation

High Definition Video

Medical Imaging

Radar Systems

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

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ADS61B23IRHBT 替代型号

型号	品牌	替代类型	描述	数据表
ADS61B23IRHBRG4	TI	完全替代	1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC32, 5 X 5 MM, GREEN, PLASTIC, QFN
ADS61B23IRHBR	TI	完全替代	12-BIT, 80-MSPS ADC WITH BUFFERED ANALOG INPUTS
ADS6123IRHBT	TI	类似代替	12-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

与ADS61B23IRHBT相关器件

型号	品牌	获取价格	描述	数据表
ADS61B23IRHBTG4	TI	获取价格	1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC32, 5 X 5 MM, GREEN, PLASTIC, QFN
ADS61B29	TI	获取价格	14-/12-Bit, 250-MSPS ADCs With Integrated Analog Buffer
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ADS61B29IRGZR	TI	获取价格	14-/12-Bit, 250-MSPS ADCs With Integrated Analog Buffer
ADS61B29IRGZT	TI	获取价格	14-/12-Bit, 250-MSPS ADCs With Integrated Analog Buffer
ADS61B49	TI	获取价格	14-/12-Bit, 250-MSPS ADCs With Integrated Analog Buffer
ADS61B49_09	TI	获取价格	14-/12-Bit, 250-MSPS ADCs With Integrated Analog Buffer
ADS61B49IRGZ25	TI	获取价格	14-/12-Bit, 250-MSPS ADCs With Integrated Analog Buffer
ADS61B49IRGZR	TI	获取价格	14-/12-Bit, 250-MSPS ADCs With Integrated Analog Buffer
ADS61B49IRGZT	TI	获取价格	14-/12-Bit, 250-MSPS ADCs With Integrated Analog Buffer

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