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ADS5413-11 PDF预览

ADS5413-11

更新时间: 2024-11-29 22:50:07
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
19页 310K
描述
SINGLE 11-BIT, 65-MSPS HIGH IF SAMPLING

ADS5413-11 数据手册

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www.ti.com  
ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢅ  
SLWS156 − MARCH 2004  
ꢏꢐ  
D
Single-Ended or Differential Clock  
1-GHz −3-dB Input Bandwidth  
FEATURES  
D
D
D
D
D
D
D
D
D
D
D
D
11-Bit Resolution  
48-Pin TQFP Package With PowerPad  
(7 mm x 7 mm body size)  
65-MSPS Maximum Sample Rate  
2-V Differential Input Range  
pp  
3.3-V Single Supply Operation  
1.8-V to 3.3-V Output Supply  
400-mW Total Power Dissipation  
APPLICATIONS  
D
Cellular Base Transceiver Station Receive  
Channel  
Two’s Complement Output Format  
− High IF Sampling Applications  
− CDMA: IS-95, UMTS, CDMA1X  
− TDMA: GSM, IS-136, EDGE/UWC-136  
− Wireless Local Loop  
On-Chip S/H and Duty Cycle Adjust Circuit  
Internal or External Reference  
63.3-dBFS SNR and 72.9-dBc SFDR at  
65 MSPS and 220-MHz Input  
D
Power-Down Mode  
− Wideband Baseband Receivers  
DESCRIPTION  
The ADS5413−11 is a low power, 11-bit, 65-MSPS, CMOS pipeline analog-to-digital converter (ADC) that operates from  
a single 3.3-V supply, while offering the choice of digital output levels from 1.8 V to 3.3 V. The low noise, high linearity, and  
low clock jitter makes the ADC well suited for high-input frequency sampling applications. On-chip duty cycle adjust circuit  
allows the use of a non-50% duty cycle. This can be bypassed for applications requiring low jitter or asynchronous  
sampling. The device can also be clocked with single ended or differential clock, without change in performance. The  
internal reference can be bypassed to use an external reference to suit the accuracy and low drift requirements of the  
application.  
The device is specified over full temperature range (−40°C to +85°C).  
FUNCTIONAL BLOCK DIAGRAM  
AVDD  
OVDD  
PWD  
VINP  
Gain  
Stage  
Gain  
Stage  
Gain  
Stage  
Flash  
A/D  
S/H  
Σ
Σ
Σ
7 Stages  
VINN  
A/D  
D/A  
A/D  
D/A  
A/D  
D/A  
REF SEL  
VREFT  
CML  
2.25 V  
Internal  
Reference  
Generator  
2
2
2
2
1.8 V  
VREFB  
1.25 V  
VBG  
Digital Error Correction  
CLK  
DCA  
CLKC  
DCA  
D[0:10]  
AGND OGND  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments  
semiconductor products and disclaimers thereto appears at the end of this data sheet.  
CommsADC is a trademark of Texas Instruments.  
ꢓꢙ ꢖ ꢁꢚ ꢗ ꢏꢈ ꢖꢉ ꢁ ꢀꢏꢀ ꢛꢜ ꢝꢞ ꢟ ꢠꢡ ꢢꢛꢞꢜ ꢛꢣ ꢤꢥ ꢟ ꢟ ꢦꢜꢢ ꢡꢣ ꢞꢝ ꢧꢥꢨ ꢩꢛꢤ ꢡꢢꢛ ꢞꢜ ꢪꢡ ꢢꢦꢫ ꢓꢟ ꢞꢪꢥ ꢤꢢꢣ  
ꢤ ꢞꢜ ꢝꢞꢟ ꢠ ꢢꢞ ꢣ ꢧꢦ ꢤ ꢛ ꢝꢛ ꢤ ꢡ ꢢꢛ ꢞꢜꢣ ꢧ ꢦꢟ ꢢꢬꢦ ꢢꢦ ꢟ ꢠꢣ ꢞꢝ ꢏꢦꢭ ꢡꢣ ꢈꢜꢣ ꢢꢟ ꢥꢠ ꢦꢜꢢ ꢣ ꢣꢢ ꢡꢜꢪ ꢡꢟ ꢪ ꢮ ꢡꢟ ꢟ ꢡ ꢜꢢꢯꢫ  
ꢓꢟ ꢞ ꢪꢥꢤ ꢢ ꢛꢞ ꢜ ꢧꢟ ꢞ ꢤ ꢦ ꢣ ꢣ ꢛꢜ ꢰ ꢪꢞ ꢦ ꢣ ꢜꢞꢢ ꢜꢦ ꢤꢦ ꢣꢣ ꢡꢟ ꢛꢩ ꢯ ꢛꢜꢤ ꢩꢥꢪ ꢦ ꢢꢦ ꢣꢢꢛ ꢜꢰ ꢞꢝ ꢡꢩ ꢩ ꢧꢡ ꢟ ꢡꢠ ꢦꢢꢦ ꢟ ꢣꢫ  
Copyright 2004, Texas Instruments Incorporated  

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