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ADS131M02_V01 PDF预览

ADS131M02_V01

更新时间: 2022-06-24 15:39:41
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德州仪器 - TI /
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92页 3091K
描述
ADS131M02 2-Channel, Simultaneously-Sampling, 24-Bit, Delta-Sigma ADC

ADS131M02_V01 数据手册

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ADS131M02  
SBAS853A – JANUARY 2020 – REVISED APRIL 2021  
www.ti.com  
6 Specifications  
6.1 Absolute Maximum Ratings  
See (1)  
MIN  
–0.3  
MAX  
UNIT  
V
AVDD to AGND  
AGND to DGND  
3.9  
–0.3  
0.3  
V
Power-supply voltage  
DVDD to DGND  
–0.3  
3.9  
2.2  
V
DVDD to DGND, CAP tied to DVDD  
CAP to DGND  
–0.3  
V
–0.3  
2.2  
V
Analog input voltage  
Digital input voltage  
Input current  
AINxP, AINxN  
AGND – 1.6  
DGND – 0.3  
–10  
AVDD + 0.3  
DVDD + 0.3  
10  
V
CS, CLKIN, DIN, SCLK, SYNC/RESET  
Continuous, all pins except power-supply pins  
Junction, TJ  
V
mA  
150  
Temperature  
°C  
Storage, Tstg  
–60  
150  
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply  
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions.  
If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully  
functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.  
6.2 ESD Ratings  
VALUE  
±2000  
±500  
UNIT  
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)  
V(ESD)  
Electrostatic discharge  
V
Charged device model (CDM), per JEDEC specification JESD22-C101(2)  
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.  
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.  
Copyright © 2021 Texas Instruments Incorporated  
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