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ADP7182AUJZ-3.0-R7

更新时间： 2024-11-29 15:29:39
品牌 Logo 应用领域
亚德诺 - ADI 光电二极管输出元件调节器
页数 文件大小 规格书
32页 1098K
描述
-28 V, −200 mA, Low Noise, Linear Regulator

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ADP7182AUJZ-3.0-R7 数据手册

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–28 V, −200 mA, Low Noise,  
Linear Regulator  
Data Sheet  
ADP7182  
FEATURES  
TYPICAL APPLICATION CIRCUITS  
Low noise: 18 μV rms  
Power supply rejection ratio (PSRR): 66 dB at 10 kHz at VOUT = −3 V  
Positive or negative enable logic  
Stable with small 2.2 μF ceramic output capacitor  
Input voltage range: −2.7 V to −28 V  
Maximum output current: −200 mA  
Low dropout voltage: −185 mV at −200 mA load  
Initial accuracy: 1ꢀ  
C
C
IN  
2.2µF  
OUT  
2.2µF  
GND  
V
= –8V  
ON  
V
= –5V  
VIN  
VOUT  
IN  
OUT  
ADP7182  
2V  
OFF  
–2V  
0V  
EN  
NC  
ON  
Figure 1. ADP7182 with Fixed Output Voltage, VOUT = −5 V  
Accuracy over line, load, and temperature  
+2ꢀ maximum/−3ꢀ minimum  
C
C
IN  
2.2µF  
OUT  
2.2µF  
13kΩ  
Low quiescent current, IGND = −650 μA with −200 mA load  
Low shutdown current: −2 μA  
Adjustable output from −1.22 V to −VIN + VDO  
Current-limit and thermal overload protection  
6- and 8-lead LFCSP and 5-lead TSOT  
Supported by ADIsimPower tool  
GND  
40.2kΩ  
V
= –8V  
ON  
V
= –5V  
OUT  
VIN  
VOUT  
IN  
ADP7182  
2V  
0V  
OFF  
–2V  
EN  
ADJ  
ON  
Figure 2. ADP7182 with Adjustable Output Voltage, VOUT = −5 V  
APPLICATIONS  
Regulation to noise sensitive applications  
Analog-to-digital converter (ADC) and digital-to-analog  
converter (DAC) circuits, precision amplifiers  
Communications and infrastructure  
Medical and healthcare  
Industrial and instrumentation  
GENERAL DESCRIPTION  
The ADP7182 is a CMOS, low dropout (LDO) linear regulator  
that operates from −2.7 V to −28 V and provides up to −200 mA  
of output current. This high input voltage LDO is ideal for  
regulation of high performance analog and mixed signal circuits  
operating from −27 V down to −1.2 V rails. Using an advanced  
proprietary architecture, it provides high power supply rejection  
and low noise, and achieves excellent line and load transient  
response with a small 2.2 μF ceramic output capacitor.  
The following fixed output voltages are available from stock: −5 V  
(3 mm × 3 mm LFCSP), −1.8 V, −2.5 V, −3 V, −5 V (TSOT), −1.2 V,  
−1.5 V, −2.5 V, −5 V (2 mm × 2 mm LFCSP). Additional voltages  
are available by special order.  
The ADP7182 regulator output noise is 18 μV rms independent  
of the output voltage. The enable logic is capable of interfacing  
with positive or negative logic levels for maximum flexibility.  
The ADP7182 is available in 5-lead TSOT, 6- and 8-lead LFCSP  
packages for a small, low profile footprint.  
The ADP7182 is available in fixed output voltage and an  
adjustable version that allows the output voltage to range from  
−1.22 V to −VIN + VDO via an external feedback divider.  
Rev. J  
Document Feedback  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700 ©2013–2017 Analog Devices, Inc. All rights reserved.  
Technical Support  
www.analog.com  
 
 
 
 
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