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ADP7104ACPZ-3.3-R7 PDF预览

ADP7104ACPZ-3.3-R7

更新时间: 2024-11-23 07:18:43
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亚德诺 - ADI /
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描述
20 V, 500 mA, Low Noise, CMOS LDO

ADP7104ACPZ-3.3-R7 数据手册

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20 V, 500 mA, Low Noise, CMOS LDO  
Data Sheet  
ADP7104  
FEATURES  
TYPICAL APPLICATION CIRCUITS  
Input voltage range: 3.3 V to 20 V  
Maximum output current: 500 mA  
V
= 5V  
VIN  
VOUT  
V
= 8V  
OUT  
IN  
+
+
CIN  
1µF  
COUT  
1µF  
SENSE  
Low noise: 15 µV rms for fixed output versions  
PSRR performance of 60 dB at 10 kHz, VOUT = 3.3 V  
Reverse current protection  
Low dropout voltage: 350 mV at 500 mA  
Initial accuracy: 0.8%  
100k  
ON  
100kΩ  
100kΩ  
EN/  
UVLO  
OFF  
PG  
PG  
GND  
Accuracy over line, load, and temperature: −2%/+1%  
Low quiescent current (VIN = 5 V), IGND = 900 μA with 500 mA load  
Low shutdown current: <40 µA at VIN = 12 V, stable with small  
1 µF ceramic output capacitor  
7 fixed output voltage options: 1.5 V, 1.8 V, 2.5 V, 3 V, 3.3 V,  
5 V, and 9 V  
Adjustable output from 1.22 V to VIN − VDO  
Foldback current limit and thermal overload protection  
User programmable precision UVLO/enable  
Power-good indicator  
Figure 1. ADP7104 with Fixed Output Voltage, 5 V  
V
= 5V  
VIN  
VOUT  
ADJ  
V
= 8V  
ON  
OUT  
IN  
+
+
CIN  
1µF  
COUT  
1µF  
40.2k  
13kΩ  
100kΩ  
100kΩ  
EN/  
UVLO  
100kΩ  
OFF  
PG  
PG  
GND  
8-lead LFCSP and 8-lead SOIC packages  
Figure 2. ADP7104 with Adjustable Output Voltage, 5 V  
APPLICATIONS  
Regulation to noise sensitive applications: ADC, DAC circuits,  
precision amplifiers, high frequency oscillators, clocks,  
and PLLs  
Communications and infrastructure  
Medical and healthcare  
Industrial and instrumentation  
GENERAL DESCRIPTION  
The ADP7104 is a CMOS, low dropout linear regulator that  
operates from 3.3 V to 20 V and provides up to 500 mA of  
output current. This high input voltage LDO is ideal for  
regulation of high performance analog and mixed signal  
circuits operating from 19 V to 1.22 V rails. Using an  
advanced proprietary architecture, it provides high power  
supply rejection, low noise, and achieves excellent line and  
load transient response with just a small 1 µF ceramic  
output capacitor.  
The ADP7104 output noise voltage is 15 μV rms and is inde-  
pendent of the output voltage. A digital power-good output  
allows power system monitors to check the health of the output  
voltage. A user programmable precision undervoltage lockout  
function facilitates sequencing of multiple power supplies.  
The ADP7104 is available in 8-lead, 3 mm × 3 mm LFCSP  
and 8-lead SOIC packages. The LFCSP offers a very compact  
solution and also provides excellent thermal performance for  
applications requiring up to 500 mA of output current in a  
small, low-profile footprint.  
The ADP7104 is available in seven fixed output voltage options  
and an adjustable version, which allows output voltages that  
range from 1.22 V to VIN − VDO via an external feedback divider.  
Rev. B  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rightsof third parties that may result fromits use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks andregisteredtrademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
www.analog.com  
Fax: 781.461.3113 ©2011–2012 Analog Devices, Inc. All rights reserved.  
 
 
 
 

ADP7104ACPZ-3.3-R7 替代型号

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