Data Sheet
ADP5587
Table 27. GPIO_INT_ENx—Register 0x1A to Register 0x1C (GPIO Interrupt Enable)
Register Name
Register Description
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
GPIO_INT_EN1
(Register 0x1A)
GPIO interrupt enable (enables interrupts for
GP inputs only)
R7IE
R6IE
R5IE
R4IE
R3IE
R2IE
R1IE
R0IE
GPIO_INT_EN2
(Register 0x1B)
GPIO interrupt enable (enables interrupts for
GP inputs only)
C7IE
N/A
C6IE
N/A
C5IE
N/A
C4IE
N/A
C3IE
N/A
C2IE
N/A
C1IE
C9IE
C0IE
C8IE
GPIO_INT_EN3
(Register 0x1C)
GPIO interrupt enable (enables interrupts for
GP inputs only)
Table 28. KP_GPIOx—Register 0x1D to Register 0x1F (Keypad or GPIO Selection)
Register Name
Register Description
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
R3
Bit 2
Bit 1
Bit 0
KP_GPIO1
(Register 0x1D)
Keypad or GPIO selection
0: GPIO
1: KP matrix
R7
R6
R5
R4
R2
R1
C1
C9
R0
C0
C8
KP_GPIO2
(Register 0x1E)
Keypad or GPIO selection
0: GPIO
1: KP matrix
C7
C6
C5
C4
C3
C2
KP_GPIO3
(Register 0x1F)
Keypad or GPIO selection
0: GPIO
N/A
N/A
N/A
N/A
N/A
N/A
1: KP matrix
Table 29. GPI_EM_REGx—Register 0x20 to Register 0x22 (GPI Event Mode 1 to GPI Event Mode 3)
Register Name
Register Description
Bit 7
Bit 6
Bit
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
GPI_EM_REG1
(Register 0x20)
GPI Event Mode Register 1
0: GPI not part of event FIFO
1: GPI part of event FIFO (R0 to R7)
R7_EM R6_EM R5_EM R4_EM R3_EM R2_EM R1_EM R0_EM
GPI_EM_REG2
(Register 0x21)
GPI Event Mode Register 2
0: GPI not part of event FIFO
1: GPI part of event FIFO (C0 to C7)
C7_EM C6_EM C5_EM C4_EM C3_EM C2_EM C1_EM C0_EM
GPI_EM_REG3
(Register 0x22)
GPI Event Mode Register 3
0: GPI not part of event FIFO
1: GPI part of event FIFO (C8 to C9)
NA
NA
NA
NA
NA
NA
C9_EM C8_EM
Table 30. GPIO_DIRx—Register 0x23 to Register 0x25 (GPIO Data Direction)
Register Name
Register Description
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
GPIO_DIR1
(Register 0x23)
GPIO data direction
0: input
R7D
R6D
R5D
R4D
R3D
R2D
R1D
R0D
1: output
GPIO_DIR2
(Register 0x24)
GPIO data direction
0: input
1: output
C7D
N/A
C6D
N/A
C5D
N/A
C4D
N/A
C3D
N/A
C2D
N/A
C1D
C9D
C0D
C8D
GPIO_DIR3
(Register 0x25)
GPIO data direction
0: input
1: output
Table 31. GPIO_INT_LVLx—Register 0x26 to Register 0x28 (GPIO Level Detect)
Register Name
Register Description
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
GPIO_INT_LVL1
(Register 0x26)
GPIO INT level detect
0: low
R7IL
R6IL
R5IL
R4IL
R3IL
R2IL
R1IL
R0IL
1: high
GPIO_INT_LVL2
(Register 0x27)
GPIO INT level detect
0: low
1: high
C7IL
N/A
C6IL
N/A
C5IL
N/A
C4IL
N/A
C3IL
N/A
C2IL
N/A
C1IL
C9IL
C0IL
C8IL
GPIO_INT_LVL3
(Register 0x28)
GPIO INT level detect
0: low
1: high
Rev. D | Page 19 of 24