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ADP3419JRMZ-REEL PDF预览

ADP3419JRMZ-REEL

更新时间: 2024-01-01 11:57:59
品牌 Logo 应用领域
罗彻斯特 - ROCHESTER 驱动光电二极管接口集成电路驱动器
页数 文件大小 规格书
17页 1132K
描述
HALF BRDG BASED MOSFET DRIVER, PDSO10, LEAD FREE, MSOP-10

ADP3419JRMZ-REEL 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:MSOP
包装说明:LEAD FREE, MSOP-10针数:10
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.46
高边驱动器:YES接口集成电路类型:HALF BRIDGE BASED MOSFET DRIVER
JESD-30 代码:S-PDSO-G10JESD-609代码:e3
长度:3 mm湿度敏感等级:1
功能数量:1端子数量:10
最高工作温度:100 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP10,.19,20封装形状:SQUARE
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:5 V认证状态:Not Qualified
座面最大高度:1.1 mm子类别:MOSFET Drivers
标称供电电压:5 V电源电压1-最大:26 V
电源电压1-分钟:4 V表面贴装:YES
温度等级:OTHER端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:3 mm

ADP3419JRMZ-REEL 数据手册

 浏览型号ADP3419JRMZ-REEL的Datasheet PDF文件第9页浏览型号ADP3419JRMZ-REEL的Datasheet PDF文件第10页浏览型号ADP3419JRMZ-REEL的Datasheet PDF文件第11页浏览型号ADP3419JRMZ-REEL的Datasheet PDF文件第13页浏览型号ADP3419JRMZ-REEL的Datasheet PDF文件第14页浏览型号ADP3419JRMZ-REEL的Datasheet PDF文件第15页 
ADP3419  
APPLICATION INFORMATION  
SUPPLY CAPACITOR SELECTION  
POWER AND THERMAL CONSIDERATIONS  
For the supply input (VCC) of the ADP3419, a local bypass  
capacitor is recommended to reduce the noise and to supply  
some of the peak currents drawn. Use a 10 µF or 4.7 µF  
multilayer ceramic (MLC) capacitor. MLC capacitors provide  
the best combination of low ESR and small size, and can be  
obtained from the following vendors.  
The major power consumption of the ADP3419-based driver  
circuit is from the dissipation of MOSFET gate charge. It can be  
estimated as  
PMAX VCC×(QHSGATE +QLSGATE )× fMAX  
(3)  
where:  
VCC is the supply voltage 5 V.  
MAX is the highest switching frequency.  
HSGATE and QLSGATE are the total gate charge of high-side and  
Table 5.  
Vendor  
Part Number  
Web Address  
f
Q
Murata  
GRM235Y5V106Z16 www.murata.com  
Taiyo-Yuden  
Tokin  
EMK325F106ZF  
C23Y5V1C106ZP  
www.t-yuden.com  
www.tokin.com  
low-side MOSFETs, respectively.  
For example, the ADP3419 drives two IRF7821 high-side  
MOSFETs and two IRF7832 low-side MOSFETs. According to  
Keep the ceramic capacitor as close as possible to the ADP3419.  
the MOSFET data sheets, QHSGATE = 18.6 nC and QLSGATE  
68 nC. Given that fMAX is 300 kHz, PMAX would be about  
130 mW.  
=
BOOTSTRAP CIRCUIT  
The bootstrap circuit uses a charge storage capacitor (CBST) and  
a Schottky diode (D1), as shown in Figure 17. Selection of these  
components can be done after the high-side MOSFET has been  
chosen. The bootstrap capacitor must have a voltage rating that  
is able to handle at least 5 V more than the maximum supply  
voltage. The capacitance is determined by  
Part of this power consumption generates heat inside the  
ADP3419. The temperature rise of the ADP3419 against its  
environment is estimated as  
T θJA ×PMAX ×η  
(4)  
QHSGATE  
VBST  
CBST  
=
(1)  
where θJA is ADP3419s thermal resistance from junction to air,  
given in the absolute maximum ratings as 220°C/W for a  
4-layer board.  
where:  
HSGATE is the total gate charge of the high-side MOSFET.  
VBST is the voltage droop allowed on the high-side MOSFET  
Q
The total MOSFET drive power dissipates in the output  
resistance of ADP3419 and in the MOSFET gate resistance as  
well. η represents the ratio of power dissipation inside the  
ADP3419 over the total MOSFET gate driving power. For  
normal applications, a rough estimation for η is 0.7. A more  
accurate estimation can be calculated using  
drive.  
For example, two IRF7811 MOSFETs in parallel have a total  
gate charge of about 36 nC. For an allowed droop of 100 mV,  
the required bootstrap capacitance is 360 nF. A good quality  
ceramic capacitor should be used, and derating for the signifi-  
cant capacitance drop of MLCs at high temperature must be  
applied. In this example, selection of 470 nF or even 1 µF would  
be recommended.  
QHSGATE  
QHSGATE + QLSGATE  
0.5× R1  
0.5× R2  
η ≈  
×
+
R1+ RHSGATE + R R2 + RHSGATE  
(5)  
QLSGATE  
QHSGATE + QLSGATE  
0.5× R3  
R3 + RLSGATE R4 + RLSGATE  
0.5× R4  
+
×
+
A Schottky diode is recommended for the bootstrap diode due  
to its low forward drop, which maximizes the drive available for  
the high-side MOSFET. The bootstrap diode must also be able  
to handle at least 5 V more than the maximum battery voltage.  
The average forward current can be estimated by  
where:  
R1 and R2 are the output resistances of the high-side driver:  
R1 = 1.7 (DRVH − BST), R2 = 0.8 (DRVH − SW).  
R3 and R4 are the output resistances of the low-side driver:  
R3 = 1.7 (DRVL − VCC), R4 = 0.8 (DRVL − GND).  
R is the external resistor between the BST pin and the BST  
capacitor.  
IF(AVG) = QHSGATE × fMAX  
(2)  
where fMAX is the maximum switching frequency of the  
R
HSGATE and RLSGATE are gate resistances of high-side and low-side  
controller.  
MOSFETs, respectively.  
Assuming that R = 0 and that RHSGATE = RLSGATE = 0.5, Equation 5  
gives a value of η = 0.71. Based on Equation 4, the estimated  
temperature rise in this example is about 22°C.  
Rev. A | Page 11 of 16  
 

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