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ADP3166JRU-REEL PDF预览

ADP3166JRU-REEL

更新时间: 2024-11-29 22:19:47
品牌 Logo 应用领域
亚德诺 - ADI 控制器
页数 文件大小 规格书
20页 346K
描述
5-Bit Programmable 2-, 3-, 4-Phase Synchronous Buck Controller

ADP3166JRU-REEL 数据手册

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5-Bit Programmable 2-, 3-, 4-Phase  
Synchronous Buck Controller  
ADP3166*  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
Selectable 2-, 3- or 4-Phase Operation at up to  
1 MHz per Phase  
VCC  
28  
RAMPADJ RT  
14  
13  
Differential Sensing Error 1% over Temperature  
Logic-Level PWM Outputs for Interface to  
External High Power Drivers  
Active Current Balancing between All Output Phases  
Built-in Power Good Blanking Supports On-the-Fly  
VID Code Changes  
5-Bit Digitally Programmable 0.8 V to 1.55 V Output  
Short-Circuit Protection with Programmable  
Latch-Off Delay  
ADP3166  
UVLO  
SHUTDOWN  
AND BIAS  
EN  
11  
OSCILLATOR  
SET  
RESET  
EN  
+
27 PWM1  
26 PWM2  
25 PWM3  
CMP  
GND  
19  
6
+
CROWBAR  
RESET  
2-, 3-, 4-PHASE  
DRIVER LOGIC  
CMP  
CURRENT  
BALANCING  
CIRCUIT  
CSREF  
2.1V  
+
+
RESET  
CMP  
+
+
DAC + 300mV  
CSREF  
RESET  
PWM4  
24  
CURRENT  
CMP  
Overvoltage Protection Crowbar Logic Output  
CROWBAR  
+
LIMIT  
APPLICATIONS  
DAC – 300mV  
Desktop PC Power Supplies  
Next-Generation AMD Processors  
VRM Modules  
23  
22  
21  
20  
SW1  
SW2  
SW3  
SW4  
PWRGD 10  
DELAY  
GENERAL DESCRIPTION  
ILIMIT  
15  
The ADP3166 is a highly efficient, multiphase, synchronous  
buck switching regulator controller optimized for converting a  
12 V main supply into the core supply voltage required by high  
performance AMD processors. It uses an internal 5-bit DAC to  
read a voltage identification (VID) code directly from the pro-  
cessor, which is used to set the output voltage between 0.8 V  
and 1.55 V. The ADP3166 also uses a multimode PWM  
architecture to drive the logic-level outputs at a programmable  
switching frequency that can be optimized for VRM size and  
efficiency. The phase relationship of the output signals can be  
programmed to provide 2-, 3-, or 4-phase operation, allowing  
for the construction of up to four complementary buck switch-  
ing stages.  
+
17  
16  
CSSUM  
CSREF  
CURRENT  
LIMIT  
CIRCUIT  
EN  
DELAY  
COMP  
12  
9
18  
CSCOMP  
SOFT  
START  
+
FB  
8
+
PRECISION  
REFERENCE  
VID  
DAC  
7
1
2
3
4
5
FBRTN  
VID4 VID3 VID2 VID1 VID0  
The ADP3166 includes programmable no-load offset and slope  
functions to adjust the output voltage as a function of the load  
current so that it is always optimally positioned for a system  
transient. The ADP3166 also provides accurate and reliable  
short-circuit protection, adjustable current limiting, and a delayed  
power good output that accommodates on-the-fly output volt-  
age changes requested by the CPU.  
ADP3166 is specified over the commercial temperature range of  
0°C to 85°C and is available in a 28-lead TSSOP package.  
*Patent pending  
REV. 0  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat  
may result from its use. No license is granted by implication or otherwise  
under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective companies.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
www.analog.com  
© 2003 Analog Devices, Inc. All rights reserved.  

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