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ADP2323ACPZ-R7 PDF预览

ADP2323ACPZ-R7

更新时间: 2024-11-23 12:55:43
品牌 Logo 应用领域
亚德诺 - ADI 稳压器开关式稳压器或控制器电源电路开关式控制器PC
页数 文件大小 规格书
32页 976K
描述
Dual 3 A, 20 V Synchronous Step-Down Regulator with Integrated High-Side MOSFET

ADP2323ACPZ-R7 数据手册

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Dual 3 A, 20 V Synchronous Step-Down  
Regulator with Integrated High-Side MOSFET  
Data Sheet  
ADP2323  
FEATURES  
TYPICAL APPLICATION CIRCUIT  
Input voltage: 4.5 V to 20 V  
R
TOP1  
1% output accuracy  
Integrated 90 mΩ typical high-side MOSFET  
Flexible output configuration  
C
C1  
V
IN  
R
BOT1  
C
SS1  
R
C1  
C
IN1  
Dual output: 3 A/3 A  
Parallel single output: 6 A  
C
BST1  
INTVCC  
MODE  
SCFG  
TRK2  
TRK1  
VDRV  
L1  
V
OUT1  
C
INT  
SW1  
DL1  
Programmable switching frequency: 250 kHz to 1.2 MHz  
External synchronization input with programmable phase  
shift, or internal clock output  
Selectable PWM or PFM mode operation  
Adjustable current limit for small inductor  
External compensation and soft start  
Startup into precharged output  
M1  
M2  
C
OUT1  
ADP2323  
C
DRV  
PGND  
DL2  
GND  
PGOOD2  
PGOOD1  
SYNC  
C
OUT2  
OUT2  
Supported by ADIsimPowerdesign tool  
RT  
SW2  
V
R
L2  
OSC  
R
C
BST2  
APPLICATIONS  
Communications infrastructure  
Networking and servers  
Industrial and instrumentation  
Healthcare and medical  
Intermediate power rail conversion  
DC-to-dc point of load applications  
R
C2  
V
C
IN  
SS2  
C
BOT2  
C2  
C
R
IN2  
TOP2  
Figure 1.  
inputs and power good outputs provide reliable power sequencing.  
To enhance system reliability, the device also includes undervoltage  
lockout (UVLO), overvoltage protection (OVP), overcurrent pro-  
tection (OCP), and thermal shutdown (TSD).  
GENERAL DESCRIPTION  
The ADP2323 is a full featured, dual output, step-down dc-to-  
dc regulator based on current-mode architecture. The ADP2323  
integrates two high-side power MOSFETs and two low-side drivers  
for the external N-channel MOSFETs. The two pulse-width mod-  
ulation (PWM) channels can be configured to deliver dual 3 A  
outputs or a parallel-to-single 6 A output. The regulator operates  
from input voltages of 4.5 V to 20 V, and the output voltage can  
be as low as 0.6 V.  
The ADP2323 operates over the −40°C to +125°C junction  
temperature range and is available in a 32-lead LFCSP_WQ  
package.  
100  
95  
90  
85  
80  
75  
70  
65  
The switching frequency can be programmed between 250 kHz  
and 1.2 MHz, or synchronized to an external clock to minimize  
interference in multirail applications. The dual PWM channels  
run 180° out of phase, thereby reducing input current ripple as  
well as reducing the size of the input capacitor.  
The bidirectional synchronization pin can be programmed at  
a 60°, 90°, or 120° phase shift, providing the possibility for a  
stackable multiphase power solution.  
V
V
= 5V  
= 3.3V  
60  
55  
50  
OUT  
OUT  
The ADP2323 can be set to operate in pulse-frequency modulation  
(PFM) mode at a light load for higher efficiency or in forced  
PWM for noise sensitive applications. External compensation  
and soft start provide design flexibility. Independent enable  
0
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
OUTPUT CURRENT (A)  
Figure 2. Efficiency vs. Output Current at VIN = 12 V, fSW = 600 kHz  
Rev. A  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rightsof third parties that may result fromits use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks andregisteredtrademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
www.analog.com  
Fax: 781.461.3113 ©2011–2012 Analog Devices, Inc. All rights reserved.  
 
 
 
 

ADP2323ACPZ-R7 替代型号

型号 品牌 替代类型 描述 数据表
LM25119PSQE/NOPB TI

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