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ADP2121ACBZ-1.85R7 PDF预览

ADP2121ACBZ-1.85R7

更新时间: 2024-01-16 12:27:14
品牌 Logo 应用领域
亚德诺 - ADI 开关
页数 文件大小 规格书
21页 2380K
描述
600 mA, 6 MHz Synchronous Step-Down DC-to-DC Converter

ADP2121ACBZ-1.85R7 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:BGA
包装说明:VFBGA, BGA6,2X3,16针数:6
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.65
其他特性:ALSO HAS CONTROL TECHNIQUE OF PFM模拟集成电路 - 其他类型:SWITCHING REGULATOR
控制模式:VOLTAGE-MODE控制技术:PULSE WIDTH MODULATION
最大输入电压:5.5 V最小输入电压:2.3 V
标称输入电压:3.6 VJESD-30 代码:R-PBGA-B6
JESD-609代码:e3长度:1.3 mm
湿度敏感等级:1功能数量:1
端子数量:6最高工作温度:85 °C
最低工作温度:-40 °C最大输出电流:1.222 A
标称输出电压:1.85 V封装主体材料:PLASTIC/EPOXY
封装代码:VFBGA封装等效代码:BGA6,2X3,16
封装形状:RECTANGULAR封装形式:GRID ARRAY, VERY THIN PROFILE, FINE PITCH
峰值回流温度(摄氏度):225认证状态:Not Qualified
座面最大高度:0.66 mm子类别:Switching Regulator or Controllers
表面贴装:YES切换器配置:BUCK
最大切换频率:6640 kHz温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:BALL
端子节距:0.4 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:0.9 mm
Base Number Matches:1

ADP2121ACBZ-1.85R7 数据手册

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Data Sheet  
ADP2121  
repeats. The output voltage, switching node voltage, and  
inductor current during this process are shown in Figure 54.  
OUTPUT VOLTAGE (20mV/DIV, 1.82V DC OFFSET)  
OUTPUT VOLTAGE (20mV/DIV, 1.82V DC OFFSET)  
SWITCH NODE VOLTAGE (1V/DIV)  
INDUCTOR CURRENT (200mA/DIV)  
SWITCH NODE VOLTAGE  
(2V/DIV)  
V
= 3.6V  
OUT  
= 200mA  
IN  
V
= 1.82V  
INDUCTOR CURRENT  
(200mA/DIV)  
V
V
= 3.6V  
= 1.82V  
IN  
OUT  
= 25mA  
I
OUT  
I
OUT  
TIME (100ns/DIV)  
Figure 52. Typical PWM Operation  
Auto Mode (PFM and PWM Switching)  
TIME (1µs/DIV)  
Figure 54. Typical PFM Operation  
Auto mode is a power-saving feature that enables the converter  
to switch between PWM and PFM in response to the output  
load. Auto mode is enabled when the MODE pin is pulled low.  
In auto mode, the ADP2121 operates in PFM mode for light load  
currents and switches to PWM mode for medium and heavy load  
currents. Figure 53 uses the typical threshold values of the 1.82 V  
output voltage option to demonstrate the behavior of the ADP2121  
in auto mode. The threshold values shift accordingly for other  
output voltages.  
Mode Transition  
When the MODE pin is low, the converter switches between  
PFM and PWM modes automatically to maintain optimal  
transient response and efficiency. The mode transition point  
depends on the input voltage. Hysteresis exists in the transition  
point to prevent instability and decreased efficiencies that could  
result if the converter were able to oscillate between PFM and  
PWM for a fixed input voltage and load current. See Figure 22,  
Figure 23, and Figure 24 for typical values.  
MODE TRANSITION POINT*  
I
= 70mA TO 170mA (TYPICAL)  
OUT  
A switch from PFM to PWM occurs when the output voltage dips  
below the nominal value of the output voltage option. Switching  
to PWM allows the converter to maintain efficiency and supply  
a larger current to the load.  
1.875V  
OUTPUT VOLTAGE (V)  
1.820V  
TIME (µs)  
TIME (µs)  
The switch from PWM to PFM occurs when the output current  
is below the PFM threshold for multiple consecutive switching  
cycles. Switching to PFM allows the converter to save power by  
supplying the lighter load current with fewer switching cycles.  
INDUCTOR CURRENT (mA)  
0mA  
Figure 53 shows that the output voltage in PFM mode is slightly  
higher to keep the ADP2121 from oscillating between modes,  
ensuring stable operation.  
*PFM AND PWM THRESHOLD VARIES WITH INPUT VOLTAGE.  
SEE FIGURE 22, FIGURE 23 and FIGURE 24 FOR TYPICAL VALUES.  
Figure 53. PFM-to-PWM Transition Point, VOUT = 1.82 V  
Pulse Frequency Modulation (PFM)  
ENABLE/SHUTDOWN  
When the converter is operating under light load conditions,  
the effective switching frequency and supply current are  
decreased and varied using PFM to regulate the output voltage.  
This results in improved efficiencies and lower quiescent  
currents. In PFM mode, the converter only switches when  
necessary to keep the output voltage within the PFM limits set  
by an internal comparator (see Figure 53). Switching stops  
when the upper limit is reached and resumes when the lower  
limit is reached.  
The EN input turns the ADP2121 on or off. Connect EN to  
GND or logic low to shut down the part and reduce the current  
consumption to 1.0 μA (maximum). Connect EN to VIN or to  
logic high to enable the part. Do not leave this pin floating.  
INTERNAL CONTROL FEATURES  
Overcurrent Protection  
To ensure that excessively high currents do not damage the  
inductor, the ADP2121 incorporates cycle-by-cycle overcurrent  
protection. This function is accomplished by monitoring the  
instantaneous peak current on the power PMOS switch. If this  
current exceeds the maximum level (1 A typical), the PMOS is  
immediately turned off. This minimizes the potential for damage  
to power components during certain faults and transient events.  
The value listed in Table 2 is an open loop dc tested value. Inherent  
When the upper level is reached, the output stage and oscillator  
turn off to reduce the quiescent current. During this stage, the  
output capacitor supplies the current to the load. As the output  
capacitor discharges and the output voltage reaches the lower  
PFM comparator threshold, switching resumes and the process  
Rev. C | Page 15 of 20  
 
 
 
 

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