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ADP1173AN-3.3 PDF预览

ADP1173AN-3.3

更新时间: 2024-02-26 10:22:08
品牌 Logo 应用领域
其他 - ETC 开关光电二极管控制器
页数 文件大小 规格书
16页 432K
描述
Voltage-Mode SMPS Controller

ADP1173AN-3.3 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Active零件包装代码:DIP
包装说明:DIP,针数:8
Reach Compliance Code:unknown风险等级:5.68
模拟集成电路 - 其他类型:SWITCHING REGULATOR控制模式:VOLTAGE-MODE
控制技术:PULSE FREQUENCY MODULATION最大输入电压:30 V
最小输入电压:2 V标称输入电压:3 V
JESD-30 代码:R-PDIP-T8JESD-609代码:e0
长度:9.88 mm湿度敏感等级:NOT SPECIFIED
功能数量:1端子数量:8
最高工作温度:70 °C最低工作温度:
最大输出电流:1.5 A封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
座面最大高度:5.33 mm表面贴装:NO
切换器配置:BOOST最大切换频率:32 kHz
温度等级:COMMERCIAL端子面层:TIN LEAD
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

ADP1173AN-3.3 数据手册

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ADP1173  
until its FB pin is 1.245 V above its GND pin, so the output  
voltage is determined by the formula:  
LIMITING THE SWITCH CURRENT  
The ADP1173’s RLIM pin permits the switch current to be lim-  
ited with a single resistor. This current limiting action occurs on  
a pulse by pulse basis. This feature allows the input voltage to  
vary over a wide range, without saturating the inductor or ex-  
ceeding the maximum switch rating. For example, a particular  
design may require peak switch current of 800 mA with a 2.0 V  
input. If VIN rises to 4 V, however, the switch current will exceed  
1.6 A. The ADP1173 limits switch current to 1.5 A and thereby  
protects the switch, but increases the output ripple. Selecting  
the proper resistor will limit the switch current to 800 mA, even  
if VIN increases. The relationship between RLIM and maximum  
switch current is shown in Figures 4 and 5.  
R1  
VOUT =1.245 V × 1+  
R2  
+V  
IN  
R3  
+
2
3
1
C2  
I
V
SW1  
LIM  
IN  
8
4
FB  
L1  
ADP1173  
SW2  
GND  
5
+
R1  
R2  
C1  
D1  
1N5818  
The ILIM feature is also valuable for controlling inductor current  
when the ADP1173 goes into continuous-conduction mode. This  
occurs in the step-up mode when the following condition is met:  
–V  
OUT  
Figure 17. A Positive-to-Negative Converter  
VOUT +VDIODE  
VIN VSW  
1
<
1– DC  
The design criteria for the step-down application also apply to  
the positive-to-negative converter. The output voltage should be  
limited to |6.2 V|, unless a diode is inserted in series with the  
SW2 Pin (see Figure 16). Also, D1 must again be a Schottky  
diode to prevent excessive power dissipation in the ADP1173.  
where DC is the ADP1173’s duty cycle. When this relationship  
exists, the inductor current does not go all the way to zero dur-  
ing the time the switch is OFF. When the switch turns on for  
the next cycle, the inductor current begins to ramp up from the  
residual level. If the switch ON time remains constant, the in-  
ductor current will increase to a high level (see Figure 19). This  
increases output ripple, and can require a larger inductor and  
capacitor. By controlling switch current with the ILIM resistor,  
output ripple current can be maintained at the design values.  
Figure 20 illustrates the action of the ILIM circuit.  
NEGATIVE-TO-POSITIVE CONVERSION  
The circuit of Figure 18 converts a negative input voltage to a  
positive output voltage. Operation of this circuit configuration is  
similar to the step-up topology of Figure 14, except that the current  
through feedback resistor R1 is level-shifted below ground by a  
PNP transistor. The voltage across R1 is (VOUT–VBEQ1). How-  
ever, diode D2 level-shifts the base of Q1 about 0.6 V below  
ground, thereby cancelling the VBE of Q1. The addition of D2  
also reduces the circuit’s output voltage sensitivity to tempera-  
ture, which otherwise would be dominated by the –2 mV/°C VBE  
contribution of Q1. The output voltage for this circuit is deter-  
mined by the formula:  
R1  
R2  
VOUT = 1.245 V ×  
Unlike the positive step-up converter, the negative-to-positive  
converter’s output voltage can be either higher or lower than the  
input voltage.  
1N5818  
D1  
L1  
Figure 19. (ILIM Operation, RLIM = 0 )  
POSITIVE  
OUTPUT  
+
R
LIM  
C
R1  
Q1  
L
1N4148  
2
1
D2  
+
I
V
IN  
C2  
LIM  
2N3906  
3
8
SW1  
ADP1173  
10kΩ  
FB  
AO SET GND SW2  
4
6
5
7
R2  
NC NC  
NEGATIVE  
INPUT  
Figure 18. A Negative-to-Positive Converter  
Figure 20. (ILIM Operation, RLIM = 240 )  
REV. 0  
–10–  

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