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ADP1108AN-5 PDF预览

ADP1108AN-5

更新时间: 2024-01-19 13:50:19
品牌 Logo 应用领域
亚德诺 - ADI 转换器DC-DC转换器
页数 文件大小 规格书
12页 236K
描述
Micropower DC-DC Converter Adjustable and Fixed 3.3 V, 5 V, 12 V

ADP1108AN-5 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP8,.3
针数:8Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.18模拟集成电路 - 其他类型:SWITCHING REGULATOR
控制模式:VOLTAGE-MODE控制技术:PULSE FREQUENCY MODULATION
最大输入电压:30 V最小输入电压:2 V
标称输入电压:3 VJESD-30 代码:R-PDIP-T8
JESD-609代码:e0长度:9.27 mm
功能数量:1端子数量:8
最高工作温度:70 °C最低工作温度:
最大输出电流:1.5 A标称输出电压:5 V
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP8,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified座面最大高度:5.33 mm
子类别:Switching Regulator or Controllers最大供电电流 (Isup):0.15 mA
表面贴装:NO切换器配置:SINGLE
最大切换频率:25 kHz技术:BIPOLAR
温度等级:COMMERCIAL端子面层:TIN LEAD
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

ADP1108AN-5 数据手册

 浏览型号ADP1108AN-5的Datasheet PDF文件第6页浏览型号ADP1108AN-5的Datasheet PDF文件第7页浏览型号ADP1108AN-5的Datasheet PDF文件第8页浏览型号ADP1108AN-5的Datasheet PDF文件第9页浏览型号ADP1108AN-5的Datasheet PDF文件第10页浏览型号ADP1108AN-5的Datasheet PDF文件第12页 
ADP1108  
+5V  
P RO GRAMMING TH E GAIN BLO CK  
2
T he gain block of the ADP1108 can be used as a low battery de-  
tector, error amplifier or linear post regulator. T he gain block  
consists of an op amp with PNP inputs and an open-collector  
NPN output. T he inverting input is internally connected to the  
ADP1108s 1.245 V reference, while the noninverting input is  
available at the SET Pin. T he NPN output transistor will sink  
about 300 µA.  
ADP1108  
1.245V  
47kΩ  
V
IN  
R1  
AO  
TO  
REF  
6
V
SET  
BAT  
PROCESSOR  
7
GND  
5
R2  
33kΩ  
R3  
1.6MΩ  
Figure 24a shows the gain block configured as a low-battery  
monitor. Resistors R1 and R2 should be set to high values to re-  
duce quiescent current, but not so high that bias current in the  
SET input causes large errors. A value of 33 kfor R2 is a good  
compromise.  
Figure 24b. Adding Hysteresis to the Low Battery Detector  
L1*  
100H  
ZETEX  
ZTX749  
0.22Ω  
100Ω  
V
5V  
OUT  
200mA AT 6.5V  
500mA AT 8V  
T he value for R1 is then calculated from the formula:  
IN  
6.5V TO 20V  
D1  
1N5818  
C2  
VLOBATT 1.245 V  
R1 =  
100Ω  
C1  
1.245 V  
R2  
220Ω  
2
3
1
SW1  
I
V
where VLOBAT T is the desired low battery trip point. Since the  
gain block output is an open-collector NPN, a pull-up resistor  
should be connected to the positive logic power supply.  
LIM  
IN  
8
SENSE  
ADP1108-5  
*L1 = COILTRONICS CTX100-4  
GND  
5
SW2  
4
+5V  
2
ADP1108  
1.245V  
47kΩ  
V
Figure 25. 6.5 V to 5 V Step-Down Converter  
IN  
R1  
AO  
TO  
PROCESSOR  
REF  
6
V
SET  
BAT  
7
GND  
5
V
IN  
6.5V TO 20V  
R2  
33kΩ  
+
V
–1.245V  
C2  
LB  
37.7µA  
= BATTERY TRIP POINT  
220Ω  
R1 =  
3
2
1
V
LB  
V
IN  
I
LIM  
SW1  
ADP1108-5  
Figure 24a. Setting the Low Battery Detector Trip Point  
8
SENSE  
GND  
SW2  
4
L1*  
300µH  
T he circuit of Figure 24a may produce multiple pulses when ap-  
proaching the trip point, due to noise coupled into the SET in-  
put. To prevent multiple interrupts to the digital logic, hysteresis  
can be added to the circuit (Figure 24b). Resistor R3, with a  
value of 1 Mto 10 M, provides the hysteresis. T he addition  
of R3 will change the trip point slightly, so the new value for R1  
will be:  
5
+
330µF  
MBRS130T3  
–5V OUTPUT  
150mA  
*L1 = COILTRONICS CTX300-4  
Figure 26. Positive to –5 V Converter  
VLOBATT 1.245 V  
R1 =  
VL 1.245 V  
RL + R3  
1.245 V  
R2  
where VL is the logic power supply voltage, RL is the pull-up  
resistor and R3 creates the hysteresis.  
REV. 0  
–11–  

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