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ADN2847ACP-32 PDF预览

ADN2847ACP-32

更新时间: 2024-01-28 07:12:16
品牌 Logo 应用领域
亚德诺 - ADI 驱动器二极管激光二极管接口集成电路
页数 文件大小 规格书
12页 403K
描述
3 V Dual-Loop 50 Mbps to 3.3 Gbps Laser Diode Driver

ADN2847ACP-32 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QFN包装说明:HVQCCN, LCC32,.2SQ,20
针数:32Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.08接口集成电路类型:INTERFACE CIRCUIT
JESD-30 代码:S-XQCC-N32JESD-609代码:e0
长度:5 mm湿度敏感等级:3
功能数量:1端子数量:32
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装等效代码:LCC32,.2SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):240
电源:3.3 V认证状态:Not Qualified
座面最大高度:1 mm子类别:Display Drivers
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn85Pb15)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:5 mmBase Number Matches:1

ADN2847ACP-32 数据手册

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ADN2847  
The RPSET and RERSET potentiometers can be calculated using the  
The laser degrade alarm, DEGRADE, is provided to give a warning  
of imminent laser failure if the laser diode degrades further or  
environmental conditions continue to stress the LD, such as  
increasing temperature.  
following formulas.  
1.2V  
I AV  
RPSET  
=
( )  
The laser fail alarm, FAIL, is activated when the transmitter can no  
longer be guaranteed to be SONET/SDH compliant. This occurs  
when one of the following conditions arises:  
1.2V  
RERSET  
=
( )  
IMPD _ CW  
ER 1  
ER + 1  
×
× PAV  
PCW  
The ASET threshold is reached.  
where:  
I
P
I
The ALS pin is set high. This shuts off the modulation and bias  
currents to the LD, resulting in the MPD current dropping  
to zero. This gives closed-loop feedback to the system that  
ALS has been enabled.  
AV is the average MPD current.  
CW is the dc optical power specified on the laser data sheet.  
MPD_CW is the MPD current at that specified PCW.  
AV is the average power required.  
P
DEGRADE will be raised only when the bias current exceeds  
90% of ASET current.  
ER is the desired extinction ratio (ER = P1/P0).  
Note that IERSET and IPSET will change from device to device;  
however, the control loops will determine actual values. It is not  
required to know exact values for LI or MPD optical coupling.  
Monitor Currents  
IBMON, IMMON, IMPDMON, and IMPDMON2 are current  
controlled current sources from VCC. They mirror the bias, modu-  
lation, and MPD current for increased monitoring functionality.  
An external resistor to GND gives a voltage proportional to the  
current monitored.  
Loop Bandwidth Selection  
For continuous operation, the user should hardwire the LBWSET  
pin high and use 1 µF capacitors to set the actual loop bandwidth.  
These capacitors are placed between the PAVCAP and ERCAP  
pins and ground. It is important that these capacitors are low  
leakage multilayer ceramics with an insulation resistance greater  
than 100 Gor a time constant of 1000 sec, whichever is less.  
If the monitoring functions IMPDMON and IMPDMON2 are  
not required, the IMPD and IMPD2 pins must be grounded  
and the monitor photodiode output must be connected directly  
to the PSET pin.  
Operation  
Mode  
Recommended Recommended  
Dual MPD DWDM Function (48-Lead LFCSP Only)  
The ADN2847 has circuitry for a second monitor photodiode,  
MPD2. The second photodiode current is mirrored to IMPDMON2  
for wavelength control purposes and is summed internally with  
the first monitor photodiode current for the power control loop.  
For single MPD circuits, the MPD2 pin is tied to GND.  
LBWSET PAVCAP  
ERCAP  
Continuous  
50 Mbps to  
3.3 Gbps  
Optimized  
for 2.5 Gbps  
to 3.3 Gbps  
High  
1 µF  
1 µF  
Low  
22 nF  
22 nF  
This enables the system designer to use the two currents to  
control the wavelength of the laser diode using various optical  
filtering techniques inside the laser module.  
Setting LBSET low and using 22 nF capacitors results in a  
shorter loop time constant (a 10× reduction over using 1 µF  
capacitors and keeping LBWSET high.)  
If the monitor current functions IMPDMON and IMPDMON2  
are not required, then the IMPD and IMPD2 pins can be  
grounded and the monitor photodiode output can be connected  
directly to PSET.  
Alarms  
The ADN2847 is designed to allow interface compliance to ITU-  
T-G958 (11/94) section 10.3.1.1.2 (transmitter fail) and section  
10.3.1.1.3 (transmitter degrade). The ADN2847 has two active  
high alarms, DEGRADE and FAIL. A resistor between ground  
and the ASET pin is used to set the current at which these  
alarms are raised. The current through the ASET resistor is a  
ratio of 100:1 to the FAIL alarm threshold. The DEGRADE  
alarm will be raised at 90% of this level.  
IDTONE (48-Lead LFCSP Only)  
The IDTONE pin is supplied for fiber identification/supervisory  
channels or control purposes in WDM. This pin modulates the  
optical one level over a possible range of 2% of minimum IMOD  
to 10% of maximum IMOD. The level of modulation is set by  
connecting an external current sink between the IDTONE pin and  
ground. There is a gain of two from this pin to the IMOD current.  
Figure 9 shows how an AD9850/AD9851 or the AD9834 may be  
used with the ADN2847 to allow fiber identification.  
Example:  
IFAIL = 50 mA so IDEGRADE = 45 mA  
If the ID_TONE function is not used, the IDTONE pin should  
be tied to VCC. Note that using IDTONE during transmission  
may cause optical eye degradation.  
IFAIL 50 mA  
IASET  
=
=
=
= 500 µA  
100  
100  
Data, Clock Inputs  
1.2V  
IASET 500 A  
1.2  
*
Data and clock inputs are ac-coupled (10 nF capacitors are  
recommended) and terminated via a 100 internal resistor between  
DATAP and DATAN, and also between the CLKP and CLKN  
pins. There is a high impedance circuit to set the common-mode  
voltage that is designed to allow for maximum input voltage  
RASET  
=
= 2.4 kΩ  
* The smallest valid value for RASET is 1.2 k, since this corresponds to the IBIAS  
maximum of 100 mA.  
REV. 0  
–7–  

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