ADN2805ACPZ-500RL7

更新时间： 2024-01-07 16:57:42

品牌	Logo	应用领域
亚德诺 - ADI		时钟
页数	文件大小	规格书
16页	285K
描述
1.25 Gbps Clock and Data Recovery IC

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ADN2805

OUTPUT AND TIMING SPECIFICATIONS

Table 3.

Parameter

Conditions

Min

Typ

Max

Unit

LVDS OUTPUT CHARACTERISTICS

CLKOUTP/CLKOUTN, DATAOUTP/DATAOUTN

Differential Output Swing

Output Offset Voltage

Output Impedance

V_OD(see Figure 3)

V_OS(see Figure 3)

Differential

240

1125

300

1200

100

400

1275

LVDS Outputs Timing

Rise Time

Fall Time

Setup Time

Hold Time

20% to 80%

80% to 20%

T_S(see Figure 2), GbE

T_H(see Figure 2), GbE

LVCMOS

115

400

220

440

360

I²C® INTERFACE DC CHARACTERISTICS

Input High Voltage

Input Low Voltage

Input Current

V_IH

V_IL

0.7 VCC

−10.0

μA

0.3 VCC

+10.0

0.4

V_IN= 0.1 VCC or V_IN= 0.9 VCC

V_OL, I_OL= 3.0 mA

See Figure 10

Output Low Voltage

I²C INTERFACE TIMING

SCK Clock Frequency

SCK Pulse Width High

SCK Pulse Width Low

Start Condition Hold Time

Start Condition Setup Time

Data Setup Time

400

kHz

t_HIGH

t_LOW

t_HD;STA

t_SU;STA

t_SU;DAT

t_HD;DAT

t_R/t_F

t_SU;STO

600

1300

600

100

300

20 + 0.1 Cb¹

600

1300

Data Hold Time

SCK/SDA Rise/Fall Time

Stop Condition Setup Time

Bus Free Time Between a Stop and a Start

REFCLK CHARACTERISTICS

Input Voltage Range

Input Low Voltage

300

t_BUF

Optional lock-to-REFCLK mode

@ REFCLKP or REFCLKN

V_IL

Input High Voltage

V_IH

VCC

100

Minimum Differential Input Drive

Reference Frequency

Required Accuracy

mV p-p

MHz

ppm

160

100

LVTTL DC INPUT CHARACTERISTICS

Input High Voltage

V_IH

2.0

Input Low Voltage

Input High Current

Input Low Current

V_IL

0.8

μA

I_IH, V_IN= 2.4 V

I_IL, V_IN= 0.4 V

−5

LVTTL DC OUTPUT CHARACTERISTICS

Output High Voltage

Output Low Voltage

V_OH, I_OH= −2.0 mA

V_OL, I_OL= 2.0 mA

2.4

0.4

¹Cb = total capacitance of one bus line in pF. If mixed with high speed mode devices, faster fall times are allowed.

Rev. 0 | Page 4 of 16

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