ADN2805ACPZ-500RL7

更新时间： 2024-02-19 04:27:33

品牌	Logo	应用领域
亚德诺 - ADI		时钟
页数	文件大小	规格书
16页	285K
描述
1.25 Gbps Clock and Data Recovery IC

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ADN2805ACPZ-500RL7 数据手册

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ADN2805

SPECIFICATIONS

T_A= T_MINto T_MAX, VCC = V_MINto V_MAX, VEE = 0 V, C_F= 0.47 μF, SLICEP = SLICEN = VEE, input data pattern: PRBS 2²³− 1,

unless otherwise noted.

Table 1.

Parameter

Conditions

Min

Typ

Max

Unit

QUANTIZER—DC CHARACTERISTICS

Input Voltage Range

Peak-to-Peak Differential Input

Input Common-Mode Level

QUANTIZER—AC CHARACTERISTICS

Data Rate

@ PIN or NIN, dc-coupled

PIN − NIN

DC-coupled

1.8

0.2

2.3

2.8

2.0

2.8

2.5

1250

Mbps

S11

@ 2.5 GHz

Differential

−15

100

0.65

Input Resistance

Input Capacitance

LOSS-OF-LOCK (LOL) DETECT

VCO Frequency Error for LOL Assert

VCO Frequency Error for LOL Deassert

LOL Response Time

With respect to nominal

1000

250

200

ppm

μs

ACQUISITION TIME

Lock-to-Data Mode

GbE

1.5

20.0

Optional Lock to REFCLK Mode

DATA RATE READBACK ACCURACY

Fine Readback

In addition to REFCLK accuracy

Locked to 1.25 Gbps

100

ppm

POWER SUPPLY

Power Supply Voltage

Power Supply Current

OPERATING TEMPERATURE RANGE

3.0

3.3

118

3.6

131

+85

°C

−40

JITTER SPECIFICATIONS

T_A= T_MINto T_MAX, VCC = V_MINto V_MAX, VEE = 0 V, C_F= 0.47 μF, SLICEP = SLICEN = VEE, input data pattern: PRBS 2²³− 1,

unless otherwise noted.

Table 2.

Parameter

Conditions

Min

Typ

Max

Unit

PHASE-LOCKED LOOP CHARACTERISTICS

Jitter Peaking

Jitter Generation

0.03

0.003

0.04

0.001

0.02

UI rms

UI p-p

Jitter Tolerance

GbE, IEEE 802.3, 637 kHz

0.749

Rev. 0 | Page 3 of 16

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