ADN2805ACPZ-500RL7

更新时间： 2024-02-06 07:42:40

品牌	Logo	应用领域
亚德诺 - ADI		时钟
页数	文件大小	规格书
16页	285K
描述
1.25 Gbps Clock and Data Recovery IC

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1.25 Gbps Clock and Data Recovery IC

ADN2805

FEATURES

GENERAL DESCRIPTION

Locks to 1.25 Gbps NRZ serial data input

Patented clock recovery architecture

No reference clock required

The ADN2805 provides the receiver functions of quantization

and clock and data recovery for 1.25 Gbps. The ADN2805

automatically locks to all data rates without the need for an

external reference clock or programming. All SONET jitter

requirements are met, including jitter transfer, jitter generation,

and jitter tolerance.

Loss-of-lock indicator

I²C interface to access optional features

Single-supply operation: 3.3 V

Low power: 390 mW typical

All specifications are specified for −40°C to +85°C ambient

temperature, unless otherwise noted. The ADN2805 is available

in a compact 5 mm × 5 mm 32-lead LFCSP.

5 mm × 5 mm 32-lead LFCSP, Pb free

APPLICATIONS

GbE line card

FUNCTIONAL BLOCK DIAGRAM

REFCLKP/REFCLKN

LOL

CF1

CF2 VCC

VEE

(OPTIONAL)

LOOP

FILTER

FREQUENCY

DETECT

NIN

PHASE

SHIFTER

PHASE

DETECT

LOOP

FILTER

BUFFER

VCO

VREF

DATA

RE-TIMING

ADN2805

DATAOUTP/

DATAOUTN

CLKOUTP/

CLKOUTN

Figure 1.

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registeredtrademarks arethe property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

www.analog.com

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