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ADM6820 PDF预览

ADM6820

更新时间: 2024-11-29 04:04:39
品牌 Logo 应用领域
亚德诺 - ADI 驱动器
页数 文件大小 规格书
12页 213K
描述
FET Drive Simple Sequencers

ADM6820 数据手册

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FET Drive Simple Sequencers®  
ADM6819/ADM6820  
FUNCTIONAL BLOCK DIAGRAM  
FEATURES  
V
V
V
V
CC1  
CC2  
CC1  
CC2  
Single chip enables power supply sequencing of two  
supplies  
Q1  
OUT  
V
V
CC2  
CC1  
On-board charge pump fully enhances N-channel FET  
Adjustable primary supply monitor to 0.618 V  
Delay from primary supply to secondary supply enabled  
Fixed 300 ms delay (ADM6819)  
Capacitor adjustable delay (ADM6820)  
Logic/analog driven enable input (ADM6819)  
−40°C to +85°C operating range  
CHARGE  
PUMP  
V
FET  
UVLO  
R1  
R2  
LOGIC  
SETV  
GATE  
FET  
DRIVER  
0.618V  
Packaged in small 6-lead SOT-23 package  
Pin-to-pin compatibility with MAX6819/MAX6820  
TIMER  
ADM6819/  
ADM6820  
0.618V  
APPLICATIONS  
Multivoltage systems  
GND  
EN (ADM6819) - DIGITAL/ANALOG  
SETD (ADM6820)  
Figure 1.  
Dual voltage microprocessors/FPGAs/ASICs/DSPs  
Network processors  
Telecom and datacom systems  
PC/server applications  
GENERAL DESCRIPTION  
The ADM6819 and ADM6820 are simple power supply sequencers  
with FET drive capability for enhancing N-channel MOSFETs.  
These devices can monitor a primary supply voltage and  
enable/disable an external N-channel FET for a secondary  
supply. The ADM6819 has the ability to monitor two supplies.  
When more than two voltages require sequencing, multiple  
ADM6819/ADM6820 devices can be cascaded to achieve this.  
The devices operate over a supply range of 2.95 V to 5.5 V.  
The ADM6819 features an enable (EN) pin that is fed to the  
input of an additional comparator and reference circuit. This  
pin can be used as a digital enable or a secondary power good  
comparator to monitor a second supply and enables the GATE  
only if both supplies are valid. When both inputs of the internal  
comparators are above the threshold, a fixed 300 ms timeout  
occurs before the GATE is driven high and the secondary  
supply is enabled.  
An internal comparator monitors the primary supply using the  
VSET pin. The input to this comparator is externally set via a  
resistor divider from the primary supply. When the voltage at  
the VSET pin rises above the comparator threshold, an internal  
charge pump on the GATE output enhances the secondary  
supply FET.  
The ADM6820 has only one comparator that is on the SETV  
pin. It also features a timeout period that is adjustable via a  
single external capacitor on the SETD pin.  
The ADM6819/ADM6820 are packaged in small 6-lead SOT-23  
packages.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2006 Analog Devices, Inc. All rights reserved.  
 

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